Patents by Inventor Pei-Hsun Kao

Pei-Hsun Kao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11106081
    Abstract: A light-emitting mechanism comprises at least one LED, an optical unit disposed on the LED, and at least one dimming unit disposed on the optical unit and corresponding to the LED. The dimming unit includes a shading component disposed directly above the corresponding LED, the size of the shading component is greater than or equal to the size of the LED below the shading component, and the adjacent shading components are not contact with each other. The invention also provides a backlight module including the light-emitting mechanism.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: August 31, 2021
    Assignees: RADIANT(GUANGZHOU) OPTO-ELECTRONICS CO., LTD, RADIANT OPTO-ELECTRONICS CORPORATION
    Inventors: Jui-Lin Chen, Pin-Hsun Lee, Pei-Ling Kao, Yuan-Jhang Chen, Wei-Hsuan Chen, Chung-Yung Tai
  • Publication number: 20200403144
    Abstract: A magnetoresistive random access memory (MRAM) structure includes a magnetic tunnel junction (MTJ), and a top electrode which contacts an end of the MTJ. The top electrode includes a top electrode upper portion and a top electrode lower portion. The width of the top electrode upper portion is larger than the width of the top electrode lower portion. A bottom electrode contacts another end of the MTJ. The top electrode, the MTJ and the bottom electrode form an MRAM.
    Type: Application
    Filed: July 9, 2019
    Publication date: December 24, 2020
    Inventors: Kuo-Chih Lai, Yi-Syun Chou, Ko-Wei Lin, Pei-Hsun Kao, Wei Chen, Chia-Fu Cheng, Chun-Yao Yang, Chia-Chang Hsu
  • Publication number: 20200168450
    Abstract: A method for fabricating interconnect of semiconductor device. The method includes providing a base substrate, having an inter-layer dielectric layer on top. A copper interconnect structure is formed in the inter-layer dielectric layer. A pre-sputter clean process is performed with hydrogen radicals on the copper interconnect structure. A degas process is sequentially performed on the copper interconnect structure. A cobalt cap layer is formed on the copper interconnect structure.
    Type: Application
    Filed: November 28, 2018
    Publication date: May 28, 2020
    Applicant: United Microelectronics Corp.
    Inventors: Ko-Wei Lin, Kuan-Hsiang Chen, Hsin-Fu Huang, Chun-Ling Lin, Sheng-Yi Su, Pei-Hsun Kao