Patents by Inventor Pei-Hua Chen

Pei-Hua Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240305310
    Abstract: A SAR ADC includes: a sample-hold (S/H) circuit sampling an input voltage to generate a S/H output signal; a DAC generating a DAC output signal; a comparator comparing the DAC output signal with the S/H output signal to generate a comparison output signal; a SAR combinational digital circuit group; a multiplexer circuit; and a plurality of registers for registering the comparison output signal as register output signals and outputting as an output signal of the SAR ADC. The SAR combinational digital circuit group generates a plurality of first and second SAR output signals based on the register output signals. The multiplexer circuit is controlled by on the register output signals to select among the first and the second SAR output signals as a plurality of multiplexer output signals for sending to the DAC. A capacitor coupling relationship of the DAC is controlled by the multiplexer output signals.
    Type: Application
    Filed: March 28, 2023
    Publication date: September 12, 2024
    Inventors: Po-Hua CHEN, Yu-Yee LIOW, Chih-Wei WU, Wen-Hong HSU, Hsuan-Chih YEH, Pei-Wen SUN
  • Patent number: 12057206
    Abstract: A method, a computer program product, and a computer system predict medication adherence of a patient. The method includes identifying risk factors associated with medication adherence of the patient. The method includes determining a likely behaviour for medication adherence of the patient based on the identified risk factors and a temporal causal model. The temporal causal model is based on features of a patient cluster to which the patient belongs. The features are nodes in the temporal causal model. The likely behaviour is based on causality measures for each identified risk factor to the nodes. The method includes determining a current medication adherence value of the patient. The current medication adherence value is indicative of a ratio between an actual medication regiment and an expected medication regiment. The method includes determining a future medication adherence value of the patient based on the current medication adherence value and the causality measures.
    Type: Grant
    Filed: May 31, 2019
    Date of Patent: August 6, 2024
    Assignee: International Business Machines Corporation
    Inventors: Zhiguo Li, Ching-Hua Chen, Chandramouli Maduri, Pei-Yun Hsueh
  • Publication number: 20230190142
    Abstract: A system and method of adaptively testing a hearing function performs a hearing test including outputting a sound of a tested word chosen from a selected one of the word lists, receiving an input of a patient in response to the outputted sound, and determining whether the input matches with the tested word. The hearing test is repeated until a testing end condition is satisfied, wherein the selected one of the word lists in a next iteration of the hearing test has a next higher level of difficulty when the input matches with the tested word in a previous iteration of the hearing test, and the selected one of the word lists in the next iteration of the hearing test has a next lower level of difficulty when the input does not match with the tested word in the previous iteration of the hearing test.
    Type: Application
    Filed: December 14, 2022
    Publication date: June 22, 2023
    Inventors: Pei-Hua CHEN, Chia-Ying CHU, Yu-Chen HUNG
  • Patent number: 11615252
    Abstract: A dispatcher virtual assistant (DVA) that can augment the capability of emergency dispatchers while reducing human errors. Major functions of the DVA include updating an emergency incident's status in real time, recommending or reminding the dispatcher to take proper actions at the right timing, answering the dispatcher's inquiries for task-related information, and fulfilling the dispatcher's request for an incident report. The DVA system includes a dispatcher language model based on machine-learning and deep-learning algorithms, for extracting the status of a live incident from incoming incident logs, and for processing and answering inquiries or requests from the dispatcher. It is customizable for different types of emergencies and for different local communities. The DVA can be used in tandem with an existing CAD system.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: March 28, 2023
    Assignee: D8AI Inc.
    Inventors: Yin-Hsuan Wei, Angela Chen, Yuh-Bin Tsai, Fu-Chieh Chang, You-Zheng Yin, Zai-Ching Wen, Pei-Hua Chen, Hsiang-Pin Lee, Richard Li-Cheng Sheng, Hui Hsiung
  • Publication number: 20220366146
    Abstract: A dispatcher virtual assistant (DVA) that can augment the capability of emergency dispatchers while reducing human errors. Major functions of the DVA include updating an emergency incident's status in real time, recommending or reminding the dispatcher to take proper actions at the right timing, answering the dispatcher's inquiries for task-related information, and fulfilling the dispatcher's request for an incident report. The DVA system includes a dispatcher language model based on machine-learning and deep-learning algorithms, for extracting the status of a live incident from incoming incident logs, and for processing and answering inquiries or requests from the dispatcher. It is customizable for different types of emergencies and for different local communities. The DVA can be used in tandem with an existing CAD system.
    Type: Application
    Filed: May 13, 2021
    Publication date: November 17, 2022
    Inventors: Yin-Hsuan Wei, Angela Chen, Yuh-Bin Tsai, Fu-Chieh Chang, You-Zheng Yin, Zai-Ching Wen, Pei-Hua Chen, Hsiang-Pin Lee, Richard Li-Cheng Sheng, Hui Hsiung
  • Patent number: 10882099
    Abstract: A tool manufacturing method includes the steps of preparing a cylindrical blank, dividing the blank into sections, changing an outer diameter of one of the sections, and shaping the sections to complete a tool. During the shaping step, the section whose outer diameter is changed is shaped into a symmetrical polygon for serving as a head portion of the tool and shaping another section to obtain a polygon with alternate concavities and convexities thereon for serving as an engaging portion of the tool. Accordingly, the progressive execution of the method prevents the deterioration of the blank made of a high carbon content metal material, allows the tool to keep good mechanical properties, increases the manufacturing efficiency, and reduces manufacturing costs.
    Type: Grant
    Filed: July 22, 2019
    Date of Patent: January 5, 2021
    Assignee: Flozfirm Technology Research Co., Ltd.
    Inventor: Pei-Hua Chen
  • Publication number: 20200078854
    Abstract: A tool manufacturing method includes the steps of preparing a cylindrical blank, dividing the blank into sections, changing an outer diameter of one of the sections, and shaping the sections to complete a tool. During the shaping step, the section whose outer diameter is changed is shaped into a symmetrical polygon for serving as a head portion of the tool and shaping another section to obtain a polygon with alternate concavities and convexities thereon for serving as an engaging portion of the tool. Accordingly, the progressive execution of the method prevents the deterioration of the blank made of a high carbon content metal material, allows the tool to keep good mechanical properties, increases the manufacturing efficiency, and reduces manufacturing costs.
    Type: Application
    Filed: July 22, 2019
    Publication date: March 12, 2020
    Inventor: PEI-HUA CHEN
  • Patent number: 10567314
    Abstract: This invention provides programmable intelligent agents that facilitate and manage voice or video conversations between human users and chatbots over the Internet or the Public Switched Telephone Network. Functions of said intelligent agents include providing the communication connectivity, coordinating the human-chatbot conversation, reacting and responding to the human user's conversational behavior, and in certain applications, sending controlling signals to peripheral devices according to intents of the conversation, or receiving data from peripheral sensors as references to alter the course of the conversation. Furthermore, a said intelligent agent can serve as a user interface that enables human users in the vicinity of the intelligent agent to engage in an interactive three-way conversation with a chatbot and remote human users.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: February 18, 2020
    Assignee: D8AI Inc.
    Inventors: Fu-Chieh Chang, Yuh-Bin Tsai, Jeng-Chuan Chang, You-Zheng Yin, Pei-Hua Chen, Richard Li-Cheng Sheng, Hui Hsiung
  • Patent number: 9847138
    Abstract: A shift register includes shift register units, in which at least one shift register unit is coupled to a forestage shift register unit and a post-stage shift register unit, where the at least one shift register unit includes a signal input circuit, a signal output circuit, a pull down circuit and a switching circuit. The signal input circuit electrically coupled to the forestage shift register unit can receive a logic signal from the forestage shift register. The signal output circuit is electrically coupled to the signal input circuit via a control signal terminal and is electrically coupled to the post-stage shift register unit. The signal output circuit can receive a first clock signal. The pull down circuit is electrically coupled to or electrically isolated from the control signal terminal through the switching circuit.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: December 19, 2017
    Assignee: AU OPTRONICS CORP.
    Inventors: Pei-Hua Chen, Yu-Hsin Ting, Chung-Lin Fu, Tsao-Wen Lu, Nan-Ying Lin, Wei-Chun Hsu
  • Publication number: 20160189798
    Abstract: A shift register includes shift register units, in which at least one shift register unit is coupled to a forestage shift register unit and a post-stage shift register unit, where the at least one shift register unit includes a signal input circuit, a signal output circuit, a pull down circuit and a switching circuit. The signal input circuit electrically coupled to the forestage shift register unit can receive a logic signal from the forestage shift register. The signal output circuit is electrically coupled to the signal input circuit via a control signal terminal and is electrically coupled to the post-stage shift register unit. The signal output circuit can receive a first clock signal. The pull down circuit is electrically coupled to or electrically isolated from the control signal terminal through the switching circuit.
    Type: Application
    Filed: March 4, 2016
    Publication date: June 30, 2016
    Inventors: Pei-Hua CHEN, Yu-Hsin Ting, Chung-Lin Fu, Tsao-Wen Lu, Nan-Ying Lin, Wei-Chun Hsu
  • Patent number: 9318064
    Abstract: A shift register includes shift register units, in which at least one shift register unit is coupled to a forestage shift register unit and a post-stage shift register unit, where the at least one shift register unit includes a signal input circuit, a signal output circuit, a pull down circuit and a switching circuit. The signal input circuit electrically coupled to the forestage shift register unit can receive a logic signal from the forestage shift register. The signal output circuit is electrically coupled to the signal input circuit via a control signal terminal and is electrically coupled to the post-stage shift register unit. The signal output to circuit can receive a first clock signal. The pull down circuit is electrically coupled to or electrically isolated from the control signal terminal through the switching circuit.
    Type: Grant
    Filed: October 26, 2012
    Date of Patent: April 19, 2016
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Pei-Hua Chen, Yu-Hsin Ting, Chung-Lin Fu, Tsao-Wen Lu, Nan-Ying Lin, Wei-Chun Hsu
  • Patent number: 8836679
    Abstract: In one aspect, an LCD includes a display panel with a pixel matrix having M scan lines and N data lines, and a multiplexer feed-through compensation circuit, which includes P signal lines for providing P video signals, P multiplexers, and K pairs of control lines providing K pairs of control signals. Each multiplexer is electrically coupled to a corresponding signal line and has K channels. Each channel includes first and second switches parallel-connected between the signal line and a corresponding data line for selectively transmitting the video signal to the corresponding data line. Each pair of control lines is respectively electrically coupled to the first and second switches of a corresponding channel of each multiplexer. Each pair of control signals are configured such that a time turning off one of the first and second switches is earlier than that turning off the other switch.
    Type: Grant
    Filed: August 6, 2012
    Date of Patent: September 16, 2014
    Assignee: AU Optronics Corporation
    Inventors: Nan-Ying Lin, Yu-Hsin Ting, Chung-Lin Fu, Wei-Chun Hsu, Pei-Hua Chen
  • Patent number: 8779134
    Abstract: A six-coordinated ruthenium complex is represented by the following formula (I): RuL1L2L3??(I) wherein L1 represents a 2,2?-bipyridine-based bidentate ligand having at least two functional groups selected from COOH, a carboxylate group and the combination thereof; and L2 and L3 independently represent a 1-(haloalkylpyrazole)-isoquinoline-based bidentate ligand of formula (II) or formula (III).
    Type: Grant
    Filed: October 18, 2013
    Date of Patent: July 15, 2014
    Assignee: National Tsing Hua University
    Inventors: Yun Chi, Fa-Chun Hu, Sheng-Wei Wang, Wan-Ping Ku, Pei-Hua Chen, Ya-Wan Yang
  • Patent number: 8766899
    Abstract: An active liquid crystal display panel includes a pixel array, a gate driving circuit, a data driving circuit, and an analog buffer. The gate driving circuit is used for driving M first scan lines where M is a natural number. The analog buffer is coupled to the gate driving circuit and includes M buffer circuits and a regulator. Each buffer circuit drives a corresponding second scan line according to an output signal of a corresponding first scan line of the M first scan lines, and the regulator is used for maintaining at least one reference voltage supplied to the M buffer circuits.
    Type: Grant
    Filed: April 14, 2011
    Date of Patent: July 1, 2014
    Assignee: AU Optronics Corp.
    Inventors: Wei-Chun Hsu, Yu-Hsin Ting, Chung-Lin Fu, Tsao-Wen Lu, Nan-Ying Lin, Pei-Hua Chen
  • Publication number: 20140035896
    Abstract: In one aspect, an LCD includes a display panel with a pixel matrix having M scan lines and N data lines, and a multiplexer feed-through compensation circuit, which includes P signal lines for providing P video signals, P multiplexers, and K pairs of control lines providing K pairs of control signals. Each multiplexer is electrically coupled to a corresponding signal line and has K channels. Each channel includes first and second switches parallel-connected between the signal line and a corresponding data line for selectively transmitting the video signal to the corresponding data line. Each pair of control lines is respectively electrically coupled to the first and second switches of a corresponding channel of each multiplexer. Each pair of control signals are configured such that a time turning off one of the first and second switches is earlier than that turning off the other switch.
    Type: Application
    Filed: August 6, 2012
    Publication date: February 6, 2014
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Nan-Ying Lin, Yu-Hsin Ting, Chung-Lin Fu, Wei-Chun Hsu, Pei-Hua Chen
  • Publication number: 20130141315
    Abstract: A shift register includes shift register units, in which at least one shift register unit is coupled to a forestage shift register unit and a post-stage shift register unit, where the at least one shift register unit includes a signal input circuit, a signal output circuit, a pull down circuit and a switching circuit. The signal input circuit electrically coupled to the forestage shift register unit can receive a logic signal from the forestage shift register. The signal output circuit is electrically coupled to the signal input circuit via a control signal terminal and is electrically coupled to the post-stage shift register unit. The signal output to circuit can receive a first clock signal. The pull down circuit is electrically coupled to or electrically isolated from the control signal terminal through the switching circuit.
    Type: Application
    Filed: October 26, 2012
    Publication date: June 6, 2013
    Applicant: AU Optronics Corporation
    Inventors: Pei-Hua Chen, Yu-Hsin Ting, Chung-Lin Fu, Tsao-Wen Lu, Nan-Ying Lin, Wei-Chun Hsu
  • Publication number: 20130127697
    Abstract: A multiplexer circuit includes multiple groups of switches and multiple groups of control lines. Each control line in each one of the groups of control lines is coupled to a control end of at least one switch in corresponding one of the groups of switches, and each group of control lines is configured for synchronously transmitting an identical group of control signals. A display panel and method for transmitting signals in a display panel is also disclosed herein.
    Type: Application
    Filed: April 27, 2012
    Publication date: May 23, 2013
    Applicant: AU Optronics Corporation
    Inventors: Nan-Ying LIN, Yu-Hsin TING, Chung-Lung LI, Chung-Lin FU, Wei-Chun HSU, Pei-Hua CHEN
  • Publication number: 20120146962
    Abstract: An active liquid crystal display panel includes a pixel array, a gate driving circuit, a data driving circuit, and an analog buffer. The gate driving circuit is used for driving M first scan lines where M is a natural number. The analog buffer is coupled to the gate driving circuit and includes M buffer circuits and a regulator. Each buffer circuit drives a corresponding second scan line according to an output signal of a corresponding first scan line of the M first scan lines, and the regulator is used for maintaining at least one reference voltage supplied to the M buffer circuits.
    Type: Application
    Filed: April 14, 2011
    Publication date: June 14, 2012
    Inventors: Wei-Chun Hsu, Yu-Hsin Ting, Chung-Lin Fu, Tsao-Wen Lu, Nan-Ying Lin, Pei-Hua Chen
  • Publication number: 20120104402
    Abstract: In one aspect of the invention, an analog buffer circuit includes a p-channel field effect transistor (PTFT) and an n-channel field effect transistor (NTFT). Each of the PTFT and NTFT has a source region and a drain region defining a channel region therebetween, formed on a substrate such that the drain regions of the PTFT and the NTFT are in substantial contact with each other, a gate layer formed over and insulated from the corresponding channel region, a source electrode insulated from the gate layer and electrically connected to the corresponding source region, and a common drain electrode insulated from the gate layer and the source electrode, and is electrically connected to the drain regions of both the PTFT and the NTFT through a via defined over the depletion region.
    Type: Application
    Filed: November 3, 2010
    Publication date: May 3, 2012
    Inventors: Pei-Hua Chen, Yu-Hsin Ting, Chung-Lin Fu, Tsao-Wen Lu, Nan-Ying Lin, Wei-Chun Hsu
  • Patent number: 7163366
    Abstract: A screw includes a first thread on the shank and located close to the point of the shank, and a second thread which is connected to the first thread and extends toward the head of the screw. Each of the first and second threads includes an upper flank and a lower flank. A first angle is defined by an intersection of the upper flank and the lower flank of the first thread, and is larger than a second angle defined by an intersection of the upper flank and the lower flank of the second thread. The first thread bears larger torque and the second thread includes sharper cutting edges.
    Type: Grant
    Filed: January 5, 2005
    Date of Patent: January 16, 2007
    Inventor: Pei-Hua Chen