Abstract: The amount of laser energy absorbed by a dielectric material during laser fuse blow is increased by changing the angle at which the laser is transmitted. An increased angle of incidence will result in increased energy absorption at the top and edge of the device. This technique may eliminate the need for second pass fuse blow.

Abstract: In an integrated circuit having interconnecting lines formed on an insulated layer deposited on a semiconductor substrate which provide connections between elements integral to the integrated circuit, a fuse structure programmable by a laser beam that includes: a melt-away elongated fuse link joining two segments of an interconnecting line; a plurality of fins integral and coplanar to the fuse link, each of the fins transversally extending away from the fuse link for absorbing energy emitted by the laser beam; and a reflecting plate positioned underneath the fuse link to reflect energy provided by the laser beam back into the fuse link, such that both the combination of the fins and the reflecting plate reduces the energy emitted by the laser beam required to blow the fuse structure.

Abstract: A process for sputter deposition wherein high aspect ratio apertures are coated with conductive films exhibiting low bulk resistivity, low impurity concentrations, and regular morphologies. A collimator is used having an aspect ratio that approximates the aspect ratio of the apertures.

Abstract: Electrically conducting vias and lines are created by a three step process. First, a controlled amount of a soft, low resistivity metal (12) is deposited in a trench or hole to a point below the top surface of the dielectric (10) in which the trench or hole is formed. Subsequently, the low resistivity metal (12) is overcoated with a hard metal (16) such as CVD tungsten. Finally, chemical-mechanical polishing is used to planarize the structure. The hard metal (16) serves the function of protecting the low resistivity metal (12) from scratches and corrosion which would ordinarily be encountered if the low resistivity metal were subjected to the harsh chemical-mechanical polishing slurries. An ideal method for partially filling trenches or holes in a substrate is by sputtering at elevated temperatures such that metallization at the bottom of a trench or hole separates from metallization on a top surface adjacent the trench or hole.

Abstract: Disclosed is a process for producing multi-level conductor/insulator films on a processed semiconductor substrate having a conductor pattern. The insulator layers, each comprise a photosensitive polyimide polymer composition, and this allows the desired wiring channels and stud vias to be formed directly in the insulator layers, without the use of separate masking layers and resulting image transfer steps, thus providing a less cumbersome and costly process.

Abstract: A method for forming reactive metal silicide layers at two spaced locations on a silicon substrate, which layers can be of different thicknesses and/or of different reactive metals is provided. A sililcon substrate has a silicon dioxide layer formed thereon followed by the formation of a polysilicon layer on the silicon dioxide layer, followed by forming a layer of refractory metal, e.g. titanium on the polysilicon. A non-reflecting material, e.g. titanium nitride is formed on the refractory metal. Conventional photoresist techniques are used to pattern the titanium nitride, the titanium and polysilicon, and the titanium is reacted with the contacted polysilicon to form a titanium silicide. The portion of silicon dioxide overlying the silicon substrate is then removed and the exposed substrate is ion implanted to form source/drain regions.

Abstract: A process of forming a multi-level semiconductor metallization structure from a single deposit layer of metal. The process provides the versatility of allowing stud-up, stud-down, thick and/or thin metallization structure lines to be formed from the single layer of metal. The thick metallization structure lines are low resistance lines, and the thin metallization lines are low capacitance lines. The separation of the thin metallization lines from the semiconductor substrate can be controlled further to decrease capacitive effects.

Abstract: A method for dry etching metals that form low volatility chlordes, in which Z-Cl reaction products are controllably introduced into a conventional Cl-based plasma independent of the workpiece. The Z-Cl products (e.g., AlCl.sub.3, GaCl.sub.3, etc.) are metal chlorides that have both electron acceptor and chloride donor properties. Thus, metals M (e.g., cobalt, copper and nickel) that usually produce low volatility chlorides can be controllably complexed to form high volatility Z.sub.x Cl.sub.y M.sub.z reaction products.