Patents by Inventor Pei-Jhen WU

Pei-Jhen WU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200350284
    Abstract: The present disclosure provides a semiconductor device and a method of manufacturing the same. The semiconductor device includes a first die, a second die, a first redistribution layer, a second redistribution layer, a first interconnect structure, and a second interconnect structure. The second die is stacked on the first die, the first redistribution layer is disposed between a first substrate of the first die and a second ILD layer of the second die, and the second redistribution layer is disposed on a second substrate of the second die. The first interconnect structure connects the first redistribution layer to one of first metal lines of the first die, and the second interconnect structure connects the second redistribution layer to one of the second metal lines in the second ILD layer.
    Type: Application
    Filed: May 2, 2019
    Publication date: November 5, 2020
    Inventors: CHIANG-LIN SHIH, PEI-JHEN WU, CHING-HUNG CHANG, HSIH-YANG CHIU
  • Patent number: 10811382
    Abstract: The present disclosure provides a method of manufacturing a semiconductor device. The method includes steps of providing a first wafer including a first substrate and a plurality of first conductors over the first substrate; forming a first interconnect structure penetrating through the first substrate and contacting one of the first conductors; forming a bonding dielectric on the first substrate and the first interconnect structure; bonding a second wafer on the first wafer, wherein the second wafer includes a second substrate, a second ILD layer on a second front surface of the second substrate, and a plurality of second conductors in the second ILD layer, wherein the second ILD layer is in contact with the bonding dielectric; forming a second interconnect structure penetrating through the second substrate and into the second ILD layer and contacting the second conductor and the first interconnect structure.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: October 20, 2020
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Pei-Jhen Wu, Hsih-Yang Chiu, Chiang-Lin Shih, Ching-Hung Chang, Yi-Jen Lo
  • Patent number: 10734338
    Abstract: The present disclosure relates to a multi-ring bonding pad, a semiconductor structure having the multi-ring bonding pad, and a method of manufacturing the semiconductor structure. The bonding pad includes an inner ring member, an outer ring member, and multiple bridge members. The inner ring member has a pair of first inner edges opposite to each other, a pair of second inner edges opposite to each other, and multiple third inner edges for connecting the first inner edges to the second inner edges. The outer ring member surrounds the inner ring member and has a pair of first outer edges opposite to each other, a pair of second outer edges opposite to each other, and multiple third outer edges for connecting the first outer edges to the second outer edges. The bridge members are disposed between the inner ring member and the outer ring member for connecting the inner ring member to the outer ring member.
    Type: Grant
    Filed: February 6, 2019
    Date of Patent: August 4, 2020
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Pei-Jhen Wu, Chiang-Lin Shih, Hsih-Yang Chiu
  • Publication number: 20200168573
    Abstract: The present disclosure relates to a multi-ring bonding pad, a semiconductor structure having the multi-ring bonding pad, and a method of manufacturing the semiconductor structure. The bonding pad includes an inner ring member, an outer ring member, and multiple bridge members. The inner ring member has a pair of first inner edges opposite to each other, a pair of second inner edges opposite to each other, and multiple third inner edges for connecting the first inner edges to the second inner edges. The outer ring member surrounds the inner ring member and has a pair of first outer edges opposite to each other, a pair of second outer edges opposite to each other, and multiple third outer edges for connecting the first outer edges to the second outer edges. The bridge members are disposed between the inner ring member and the outer ring member for connecting the inner ring member to the outer ring member.
    Type: Application
    Filed: February 6, 2019
    Publication date: May 28, 2020
    Inventors: Pei-Jhen WU, Chiang-Lin SHIH, Hsih-Yang CHIU