Abstract: A decoding method, a memory control circuit unit and a memory storage device are provided. The decoding method includes: transmitting a read command sequence for reading a plurality of memory cells in order to obtain a plurality of bits, and obtaining a plurality of reliability information corresponding to each of the bits. The decoding method also includes: calculating a sum of a plurality of reliability information matching a check condition among the plurality of reliability information, and adding a balance information to the sum in order to obtain a weight corresponding to a first bit among the bits and a first syndrome. The decoding method further includes: determining whether the bits have at least one error, and if the bits have the at least one error, executing an iteration decoding procedure according to the weight.

Abstract: A decoding method, a memory control circuit unit and a memory storage device are provided. The decoding method includes: transmitting a read command sequence for reading a plurality of memory cells in order to obtain a plurality of bits, and obtaining a plurality of reliability information corresponding to each of the bits. The decoding method also includes: calculating a sum of a plurality of reliability information matching a check condition among the plurality of reliability information, and adding a balance information to the sum in order to obtain a weight corresponding to a first bit among the bits and a first syndrome. The decoding method further includes: determining whether the bits have at least one error, and if the bits have the at least one error, executing an iteration decoding procedure according to the weight.

Abstract: A zero-crossing-based analog-to-digital converter having current mismatch correction capability, that can raise resolution, energy efficiency, and sampling rate of a fully differential zero-crossing circuit, is realized through a 90 nm CMOS technology. The circuit is used mainly to correct offset error, to use a current supply separation technology and a digital correction mechanism to correct mismatch among a plurality of current supplies.

Abstract: A zero-crossing-based analog-to-digital converter having current mismatch correction capability, that can raise resolution, energy efficiency, and sampling rate of a fully differential zero-crossing circuit, is realized through a 90 nm CMOS technology. The circuit is used mainly to correct offset error, to use a current supply separation technology and a digital correction mechanism to correct mismatch among a plurality of current supplies.