Patents by Inventor Pei-Kuei Tsung

Pei-Kuei Tsung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170185406
    Abstract: A computer-implemented method of executing an instruction sequence with a recursive function call of a plurality of threads within a thread group in a Single-Instruction-Multiple-Threads (SIMT) system is provided. Each thread is provided with a function call counter (FCC), an active mask, an execution mask and a per-thread program counter (PTPC). The instruction sequence with the recursive function call is executed by the threads in the thread group according to a program counter (PC) indicating a target. Upon executing the recursive function call, for each thread, the active mask is set according to the PTPC and the target indicated by the PC, the FCC is determined when entering or returning from the recursive function call, the execution mask is determined according to the FCC and the active mask. It is determined whether an execution result of the recursive function call takes effects according to the execution mask.
    Type: Application
    Filed: December 29, 2015
    Publication date: June 29, 2017
    Inventors: Yan-Hong LU, Jia-Yang CHANG, Pao-Hung KUO, Chia-Chi CHANG, Pei-Kuei TSUNG
  • Publication number: 20170011550
    Abstract: A rendering method executed by a graphics processing unit includes: loading a vertex shading command from a first command queue to a shader module; executing the vertex shading command for computing the varying of the vertices to perform a vertex shading operation by taking the vertices as first input data; storing first tessellation stage commands into a second command queue; loading the first tessellation stage commands to the shader module; and executing the first tessellation commands for computing first tessellation stage outputs to perform a first tessellation stage of the one or more tessellation stages by taking the varying of the vertices as second input data. The vertex shading command is stored into the first command queue by a first processing unit. The varying of the vertices and the first tessellation stage outputs are stored in a cache of the graphics processing unit.
    Type: Application
    Filed: July 6, 2015
    Publication date: January 12, 2017
    Inventors: Pei-Kuei TSUNG, Shou-Jen LAI, Yan-Hong LU, Sung-Fang TSAI, Chien-Ping LU
  • Publication number: 20160379336
    Abstract: A method of a graphics-processing unit (GPU) for tile-based rendering of a display area and a graphics-processing apparatus are provided. The method includes the steps of computing vertex positions of a plurality of vertexes, wherein the first vertex corresponds to a first thread and the second vertex corresponds to a second thread; determining whether a thread merge condition is satisfied; merging the first thread and the second thread to a thread group when determining that the thread merge condition is satisfied; computing vertex varyings of the plurality of vertexes, wherein when the first thread and the second thread are merged to the thread group, a varying of the first vertex and a varying of the second vertex are computed with respect to a program counter.
    Type: Application
    Filed: March 18, 2016
    Publication date: December 29, 2016
    Inventors: Pei-Kuei TSUNG, Sung-Fang TSAI, Ming-Hao LIAO, Yang-Yao LIN, Ken-Fu LIANG, Chun-Shen LIU
  • Publication number: 20160379337
    Abstract: A graphics-processing method and a graphics-processing apparatus are provided. The graphics-processing method includes the steps of computing a vertex position of a vertex in a binning phase to obtain a first position data; generating a first signal according to a first condition, wherein when the first signal corresponds to a first value, the first position data is stored into a memory unit, and when the first signal corresponds to a second value, the vertex position of the vertex in a rendering phase is computed to obtain a second position data; computing a vertex varying of the vertex in the binning phase or the rendering phase; and rendering in the rendering phase according to either the first position data or the second position data.
    Type: Application
    Filed: March 18, 2016
    Publication date: December 29, 2016
    Inventors: Sung-Fang TSAI, Pei-Kuei TSUNG, Ming-Hao LIAO
  • Patent number: 9507601
    Abstract: An apparatus for processing a plurality of data sets is disclosed, wherein one data set of the plurality of data sets includes N components and has a data type of one of a scalar type and a vector type, wherein N is a positive integer number. The apparatus includes a memory module and a data accessing module. The memory module comprises N memory units configured to store the plurality of data sets. The data accessing module is configured to write the data set into the memory module according to a write data index corresponding to the data set and one of a first writing mapping information and a second writing mapping information, wherein the first writing mapping information is employed when the data type is one of the scalar and the vector type and the second writing mapping information is employed when the data type is the other of the scalar and the vector type.
    Type: Grant
    Filed: February 19, 2014
    Date of Patent: November 29, 2016
    Assignee: MEDIATEK INC.
    Inventors: Pei-Kuei Tsung, Mu-Fan Murphy Chang, Po-Chun Fan
  • Publication number: 20160035128
    Abstract: A graphics processing system includes a first storage device, a second storage device, a vertex position shader, a vertex classification module, and a vertex attribute shader. The vertex position shader performs vertex position shading for vertices of primitives in a frame at a binning process. The vertex classification module classifies the vertices of the primitives in the frame into first-type vertices and second-type vertices according to vertex distribution. The vertex attribute shader performs deferred vertex attribute shading for the first-type vertices and the second-type vertices at a rendering process following the binning process, wherein vertex attribute shading results of at least a portion of the first-type vertices classified by the vertex classification module are stored in the second storage device, and vertex attribute shading results of at least a portion of the second-type vertices classified by the vertex classification module are stored in the first storage device.
    Type: Application
    Filed: April 17, 2015
    Publication date: February 4, 2016
    Inventors: Xiayang Zhao, Qun-Feng Liao, Hsilin Huang, Pei-Kuei Tsung, Sung-Fang Tsai
  • Publication number: 20150332495
    Abstract: A graphics processing method and an associated graphics processing apparatus are provided, where the graphics processing method is applied to the graphics processing apparatus, the graphics processing apparatus may be positioned within an electronic device, and the graphics processing apparatus may comprise at least one portion of the electronic device. The graphics processing method includes the steps of: calculating vertex positions of a primitive in a binning phase; determining, according to specific information, whether to compute vertex varyings of the primitive in the binning phase or in a rendering phase so as to provide a determination result; computing the vertex varyings in the binning phase or in the rendering phase according to the determination result; and rendering the primitive according to the vertex positions and the vertex varyings in the rendering phase.
    Type: Application
    Filed: April 1, 2015
    Publication date: November 19, 2015
    Inventors: Ming-Hao Liao, Sung-Fang Tsai, Pei-Kuei Tsung, Hung-Wei Wu
  • Publication number: 20150234662
    Abstract: An apparatus for processing a plurality of data sets is disclosed, wherein one data set of the plurality of data sets includes N components and has a data type of one of a scalar type and a vector type, wherein N is a positive integer number. The apparatus includes a memory module and a data accessing module. The memory module comprises N memory units configured to store the plurality of data sets. The data accessing module is configured to write the data set into the memory module according to a write data index corresponding to the data set and one of a first writing mapping information and a second writing mapping information, wherein the first writing mapping information is employed when the data type is one of the scalar and the vector type and the second writing mapping information is employed when the data type is the other of the scalar and the vector type.
    Type: Application
    Filed: February 19, 2014
    Publication date: August 20, 2015
    Applicant: MEDIATEK INC.
    Inventors: Pei-Kuei Tsung, Mu-Fan Murphy Chang, Po-Chun Fan