Abstract: A staining kit is provided, including a first pattern including antibodies against T cell, B cell, NK cell, monocyte, regulatory cell, CD8, CD45, and CTLA4; a second pattern including antibodies against T cell, B cell, NK cell, monocyte, regulatory cell, dendritic cell, and CD45; a third pattern including antibodies against T cell, B cell, NK cell, monocyte, CD8, CD45, CD45RA, CD62L, CD197, CX3CR1 and TCR??; and a fourth pattern including antibodies against B cell, CD23, CD38, CD40, CD45 and IgM, wherein the antibodies of each pattern are labeled with fluorescent dyes. A method of identifying characterized immune cell subsets of a disease and a method of predicting the likelihood of NPC in a subject in the need thereof using the staining kit are also provided.

Abstract: The embodiments described herein are directed to a method for reducing fin oxidation during the formation of fin isolation regions. The method includes providing a semiconductor substrate with an n-doped region and a p-doped region formed on a top portion of the semiconductor substrate; epitaxially growing a first layer on the p-doped region; epitaxially growing a second layer different from the first layer on the n-doped region; epitaxially growing a third layer on top surfaces of the first and second layers, where the third layer is thinner than the first and second layers. The method further includes etching the first, second, and third layers to form fin structures on the semiconductor substrate and forming an isolation region between the fin structures.

Abstract: The embodiments described herein are directed to a method for reducing fin oxidation during the formation of fin isolation regions. The method includes providing a semiconductor substrate with an n-doped region and a p-doped region formed on a top portion of the semiconductor substrate; epitaxially growing a first layer on the p-doped region; epitaxially growing a second layer different from the first layer on the n-doped region; epitaxially growing a third layer on top surfaces of the first and second layers, where the third layer is thinner than the first and second layers. The method further includes etching the first, second, and third layers to form fin structures on the semiconductor substrate and forming an isolation region between the fin structures.

Abstract: A film-covered LED device includes a high thermal conductive substrate, a reflector, a plurality of LED chips, and a fluorescent film. A pair of electrical contacts is respectively disposed on two ends of the high thermal conductive substrate. A thru opening is formed on the reflector, which is disposed on the high thermal conductive substrate. The LED chips are disposed on the high thermal conductive substrate and connected electrically, within the thru opening. The fluorescent film is disposed on the reflector and casted over the LED chips. Thereby, the LEDs illumination is more evenly distributed, in maintaining illumination efficiency uniformity. The yield rate is also enhanced with savings in labor cost.

Abstract: A film-covered LED device includes a high thermal conductive substrate, a reflector, a plurality of LED chips, and a fluorescent film. A pair of electrical contacts is respectively disposed on two ends of the high thermal conductive substrate. A thru opening is formed on the reflector, which is disposed on the high thermal conductive substrate. The LED chips are disposed on the high thermal conductive substrate and connected electrically, within the thru opening. The fluorescent film is disposed on the reflector and casted over the LED chips. Thereby, the LEDs illumination is more evenly distributed, in maintaining illumination efficiency uniformity. The yield rate is also enhanced with savings in labor cost.