Patents by Inventor Pei Luan POK

Pei Luan POK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Dual step laser processing of an encapsulant of a semiconductor chip package
    Patent number: 11791169
    Abstract: A method for fabricating an electronic device includes providing an encapsulant having an encapsulation material, providing a first laser beam and forming a trench into a main surface of the encapsulant by removing the encapsulation material by means of the first laser beam, forming a mask along a portion above the edge of the trench, and providing a second laser beam and sweeping the second laser beam over a surface area of the main surface of the encapsulant, wherein the surface area covers at least an area spatially confined by the trench.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: October 17, 2023
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Pei Luan Pok, Roslie Saini bin Bakar, Chau Fatt Chiang, Chee Hong Lee, Swee Kah Lee, Yu Shien Leong, Jan Sing Loh, Yean Seng Ng
  • Dual Step Laser Processing of an Encapsulant of a Semiconductor Chip Package
    Publication number: 20210050227
    Abstract: A method for fabricating an electronic device includes providing an encapsulant having an encapsulation material, providing a first laser beam and forming a trench into a main surface of the encapsulant by removing the encapsulation material by means of the first laser beam, forming a mask along a portion above the edge of the trench, and providing a second laser beam and sweeping the second laser beam over a surface area of the main surface of the encapsulant, wherein the surface area covers at least an area spatially confined by the trench.
    Type: Application
    Filed: August 14, 2020
    Publication date: February 18, 2021
    Inventors: Pei Luan Pok, Roslie Saini bin Bakar, Chau Fatt Chiang, Chee Hong Lee, Swee Kah Lee, Yu Shien Leong, Jan Sing Loh, Yean Seng Ng
  • Semiconductor package with air cavity
    Patent number: 10777536
    Abstract: Embodiments of chip-package and corresponding methods of manufacture are provided. In an embodiment of a chip-package, the chip-package includes: a carrier having a first side and a second side opposing the first side; a first chip coupled to the first side of the carrier; a second chip coupled to the second side of the carrier; an encapsulation with a first portion, which at least partially encloses the first chip on the first side of the carrier, and a second portion, which at least partially encloses the second chip on the second side of the carrier; a via extending through the first portion of the encapsulation, the carrier and the second portion of the encapsulation; and an electrically conductive material at least partly covering a sidewall of the via in the first portion or the second portion of the encapsulation, to electrically contact the carrier at either side.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: September 15, 2020
    Assignee: Infineon Technologies AG
    Inventors: Chau Fatt Chiang, April Coleen Tuazon Bernardez, Junny Abdul Wahid, Roslie Saini bin Bakar, Kon Hoe Chin, Hock Heng Chong, Kok Yau Chua, Hsieh Ting Kuek, Chee Hong Lee, Soon Lee Liew, Nurfarena Othman, Pei Luan Pok, Werner Reiss, Stefan Schmalzl
  • Semiconductor package and method for fabricating a semiconductor package
    Patent number: 10490470
    Abstract: A method of fabricating a semiconductor package comprises providing a carrier, fabricating an opening in the carrier, attaching a semiconductor chip to the carrier and fabricating an encapsulation body covering the semiconductor chip.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: November 26, 2019
    Assignee: Infineon Technologies AG
    Inventors: Hock Heng Chong, Sook Woon Chan, Chau Fatt Chiang, Khar Foong Chung, Chee Hong Fang, Muhammat Sanusi Muhammad, Mei Chin Ng, Yean Seng Ng, Pei Luan Pok, Choon Huey Wang
  • Semiconductor Package with Air Cavity
    Publication number: 20190181120
    Abstract: Embodiments of chip-package and corresponding methods of manufacture are provided. In an embodiment of a chip-package, the chip-package includes: a carrier having a first side and a second side opposing the first side; a first chip coupled to the first side of the carrier; a second chip coupled to the second side of the carrier; an encapsulation with a first portion, which at least partially encloses the first chip on the first side of the carrier, and a second portion, which at least partially encloses the second chip on the second side of the carrier; a via extending through the first portion of the encapsulation, the carrier and the second portion of the encapsulation; and an electrically conductive material at least partly covering a sidewall of the via in the first portion or the second portion of the encapsulation, to electrically contact the carrier at either side.
    Type: Application
    Filed: December 7, 2018
    Publication date: June 13, 2019
    Inventors: Chau Fatt Chiang, April Coleen Tuazon Bernardez, Junny Abdul Wahid, Roslie Saini bin Bakar, Kon Hoe Chin, Hock Heng Chong, Kok Yau Chua, Hsieh Ting Kuek, Chee Hong Lee, Soon Lee Liew, Nurfarena Othman, Pei Luan Pok, Werner Reiss, Stefan Schmalzl
  • Semiconductor package and method for fabricating a semiconductor package
    Publication number: 20180174935
    Abstract: A method of fabricating a semiconductor package comprises providing a carrier, fabricating an opening in the carrier, attaching a semiconductor chip to the carrier and fabricating an encapsulation body covering the semiconductor chip.
    Type: Application
    Filed: December 12, 2017
    Publication date: June 21, 2018
    Inventors: Hock Heng CHONG, Sook Woon CHAN, Chau Fatt CHIANG, Khar Foong CHUNG, Chee Hong FANG, Muhammat Sanusi MUHAMMAD, Mei Chin NG, Yean Seng NG, Pei Luan POK, Choon Huey WANG