Patents by Inventor Pei-Wei Chen

Pei-Wei Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250096022
    Abstract: A semiconductor manufacturing system includes: a nozzle including a first channel that allows a fluid to flow through; a light source configured to emit light; and a light sensor configured to receive light, the light source and the light sensor being disposed within the first channel and opposite to each other. The semiconductor manufacturing system is configured to: emit light, by the light source, from within the nozzle toward a surface while the nozzle is dispensing the fluid; receive the light reflected from the surface by the light sensor, the emitted light and the reflected light adapted to be contained within the fluid; and examine a status of the reflected light. The emitted light and the reflected light propagate in a direction parallel to a longitudinal axis of the first channel.
    Type: Application
    Filed: December 5, 2024
    Publication date: March 20, 2025
    Inventors: KAI-LIN CHUANG, TSUNG-CHI CHEN, PEI-JUNG CHANG, CHUN-WEI HUANG, JUN XIU LIU
  • Publication number: 20250098378
    Abstract: A method for manufacturing an optoelectronic structure and a package structure are provided. The method includes providing a substrate and a light source module and a photonic component over the substrate; and adjusting a lens structure to a unit specific position related to the substrate to couple an optical signal from the light source module to the photonic component.
    Type: Application
    Filed: September 15, 2023
    Publication date: March 20, 2025
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Pei-Jung YANG, Jr-Wei LIN, Mei-Ju LU, Chi-Han CHEN
  • Publication number: 20250084274
    Abstract: A curable composition includes an epoxy monomer component and an aniline-based hardener. The epoxy monomer component is a first component formed from a first epoxy monomer represented by Formula (I), or a second component including the first epoxy monomer represented by Formula (I) and a second epoxy monomer different from the first epoxy monomer represented by Formula (I), wherein each of the substituents in Formula (I) is given the definitions as set forth in the Specification and Claims. Based on 100 wt % of the epoxy monomer component, an amount of the first epoxy monomer represented by Formula (I) is not smaller than 25 wt % and less than 100 wt % and an amount of the second epoxy monomer is greater than 0% and not greater than 75 wt %. A cured product formed from the curable composition, and a method for encapsulating a semiconductor device using the curable composition are also provided.
    Type: Application
    Filed: September 12, 2024
    Publication date: March 13, 2025
    Inventors: Yun-Ching WU, Yu-Lin HUANG, Ming-Tsung TSAI, Pei-Nung CHEN, Shu-Wei CHANG, Ming-Tsung HSU
  • Patent number: 12250002
    Abstract: A SAR ADC includes: a sample-hold (S/H) circuit sampling an input voltage to generate a S/H output signal; a DAC generating a DAC output signal; a comparator comparing the DAC output signal with the S/H output signal to generate a comparison output signal; a SAR combinational digital circuit group; a multiplexer circuit; and a plurality of registers for registering the comparison output signal as register output signals and outputting as an output signal of the SAR ADC. The SAR combinational digital circuit group generates a plurality of first and second SAR output signals based on the register output signals. The multiplexer circuit is controlled by on the register output signals to select among the first and the second SAR output signals as a plurality of multiplexer output signals for sending to the DAC. A capacitor coupling relationship of the DAC is controlled by the multiplexer output signals.
    Type: Grant
    Filed: March 28, 2023
    Date of Patent: March 11, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Hua Chen, Yu-Yee Liow, Chih-Wei Wu, Wen-Hong Hsu, Hsuan-Chih Yeh, Pei-Wen Sun
  • Publication number: 20250077180
    Abstract: A digital compute-in-memory (DCIM) macro includes a memory cell array and an arithmetic logic unit (ALU). The memory cell array stores weight data of a neural network. The ALU receives parallel bits of a same input channel in an activation input, and generates a convolution computation output of the parallel bits and target weight data in the memory cell array.
    Type: Application
    Filed: August 30, 2024
    Publication date: March 6, 2025
    Applicant: MEDIATEK INC.
    Inventors: Ming-Hung Lin, Ming-En Shih, Shih-Wei Hsieh, Ping-Yuan Tsai, You-Yu Nian, Pei-Kuei Tsung, Jen-Wei Liang, Shu-Hsin Chang, En-Jui Chang, Chih-Wei Chen, Po-Hua Huang, Chung-Lun Huang
  • Publication number: 20250077282
    Abstract: A digital compute-in-memory (DCIM) system includes a first DCIM macro. The first DCIM macro includes a first memory cell array and a first arithmetic logic unit (ALU). The first memory cell array has N rows that are configured to store weight data of a neural network in a single weight data download session, wherein N is a positive integer not smaller than two. The first ALU is configured to receive a first activation input, and perform convolution operations upon the first activation input and a single row of weight data selected from the N rows of the first memory cell array to generate first convolution outputs.
    Type: Application
    Filed: August 30, 2024
    Publication date: March 6, 2025
    Applicant: MEDIATEK INC.
    Inventors: Ming-Hung Lin, Ming-En Shih, Shih-Wei Hsieh, Ping-Yuan Tsai, You-Yu Nian, Pei-Kuei Tsung, Jen-Wei Liang, Shu-Hsin Chang, En-Jui Chang, Chih-Wei Chen, Po-Hua Huang, Chung-Lun Huang
  • Publication number: 20250040075
    Abstract: A computing device include a chassis, a mounting ear, a lever, and a locking unit. The chassis holds one or more electronic devices and is insertable into a rack, such as a server rack. The mounting ear is coupled to the chassis. The lever is rotatably coupled to the mounting ear and is rotatable between a first position and a second position. In the first position, the lever engages the rack to prevent the chassis from being removed. In the second position, the lever disengages the rack and allows the chassis to be removed. The locking unit is coupled to the mounting ear and transitions between locked and unlocked states. In the locked state, the locking unit secures the lever in the first position. In the unlocked state, the lever is movable from the first position to the second position.
    Type: Application
    Filed: October 30, 2023
    Publication date: January 30, 2025
    Inventors: Yaw-Tzorng TSORNG, Ming-Lung WANG, Hung-Wei CHEN, Yu-Cheng CHANG, Pei-Jung HSIEH
  • Publication number: 20250036977
    Abstract: An electronic device is configured to execute instructions: compiling a first AI model and second AI model(s) to a first compiled file and second compiled file(s), respectively, wherein the first compiled file comprises a first data set and a first command set, and the second compiled file(s) comprises second data set(s) and second command set(s); generating light version file(s) for the AI model(s), wherein the light version file(s) comprises the second command set(s) and data patch(es); storing the first compiled file and the light version file(s) to a storage device; loading the first compiled file from the storage device to a memory; loading the light version file(s) from the storage device to the memory; generating the second data set(s) according to the first data set and the data patch(es); and executing the second AI model(s) according to the generated second data set(s) and the second command set(s) in the memory.
    Type: Application
    Filed: June 23, 2024
    Publication date: January 30, 2025
    Applicant: MEDIATEK INC.
    Inventors: Chia-Wei Hsu, Yu-Lung Lu, Yen-Ting Chiang, Chih-wei Chen, Yi-Cheng Lu, Jia-Sian Hong, Kuan-Yu Chen, Pei-Kuei Tsung, Hua Wu
  • Patent number: 12205238
    Abstract: A system produces a dolly zoom effect by utilizing side view information. The system first captures a main image at a main location. The main image includes at least a foreground object of a given size and a background. The system calculates one or more side view locations based on a zoom-in factor to be applied to the background and an estimated size of the foreground object. The system then guides a user to capture one or more side view images at the one or more side view locations. The foreground object of the given size is superimposed onto a zoomed-in background. Then the side view information is used by the system to perform image inpainting.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: January 21, 2025
    Assignee: MediaTek Inc.
    Inventors: Chih-Wei Chen, Pei-Kuei Tsung, Yao-Sheng Wang, Chun Chen Lin, Chia-Ching Lin
  • Patent number: 12205237
    Abstract: A device produces a dolly zoom effect with automatic focal length adjustment. The device uses a camera to capture an initial image including at least a foreground object and a background. The device includes a size tracking circuit to identify the size of the foreground object in the initial image. The device further includes a focal length control circuit. The focal length control circuit calculates an adjusted focal length of the camera to maintain the size of the foreground object in subsequently captured images.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: January 21, 2025
    Assignee: MediaTek Inc.
    Inventors: Chih-Wei Chen, Pei-Kuei Tsung, Yao-Sheng Wang, Chun Chen Lin, Chia-Ching Lin, Hsiao-Chien Chiu
  • Publication number: 20240388322
    Abstract: A wireless serial connection communication system, including: a first circuit board, including a first antenna module which includes a first front wireless communication terminal and a first rear wireless communication terminal; and a second circuit board, disposed adjacent to the first circuit board, the second circuit board including a second antenna module which includes a second front wireless communication terminal and a second rear wireless communication terminal. The first rear wireless communication terminal is face to face adjacent to the second front wireless communication terminal. The first front wireless communication terminal and the second rear wireless communication terminal are respectively disposed on farther sides over the first and second circuit boards, with reference to the first rear wireless communication terminal and the second front wireless communication terminal.
    Type: Application
    Filed: February 28, 2024
    Publication date: November 21, 2024
    Applicant: Grace Connection Microelectronics Limited
    Inventors: Pei Wei Chen, Sheng Wei Guan
  • Patent number: 12044713
    Abstract: A switch control unit and optical control unit, including: a digital-to-analog converter, being switchable between being coupled to a first sensing unit and being coupled to a drive unit, through a common contact pad; a sensing contact pad, coupled to a second sensing unit; an analog-to-digital converter, for sensing voltages at the contact pads when coupled to the sensing units, wherein each of the sensing units has a minimum working voltage level; and a loop switching unit, coupled between the common contact pad, the analog-to-digital converter, and the sensing contact pad, wherein when the voltage at the common contact pad is substantially higher than the minimum working voltage level, the loop switching unit conducts the common contact pad to the analog-to-digital converter to sense the voltage at the common contact pad, and the digital-to-analog converter enters a high-impedance state such that the digital-to-analog converter does not sense the voltage at the common contact pad.
    Type: Grant
    Filed: July 4, 2022
    Date of Patent: July 23, 2024
    Assignee: Grace Connection Microelectronics Limited
    Inventor: Pei Wei Chen
  • Publication number: 20240244684
    Abstract: The invention provides a wireless communication identification system, including: a master wireless communication unit, sending a first wireless signal, and progressively limiting a count of remaining wireless communication units responding to the first wireless signal in the wireless communication identification system according to a signal level adjustment scenario; and a first wireless communication unit, being the last wireless communication unit in the remaining wireless communication units to respond to the first wireless signal under the signal level adjustment scenario; wherein a first wireless signal connection is established between the master wireless communication unit and the first wireless communication unit by the first wireless signal, and the wireless communication identification system transmits first unit identity information of the first wireless communication unit through the first wireless signal connection.
    Type: Application
    Filed: November 16, 2023
    Publication date: July 18, 2024
    Applicant: Grace Connection Microelectronics Limited
    Inventor: PEI WEI CHEN
  • Publication number: 20240145798
    Abstract: A distributed battery management system, for managing a plurality of battery management units, wherein each of the battery management units, includes: a first battery cell, forming a charge-discharge connection at least with a second battery cell in a second battery management unit; a monitor circuit, monitoring a discharge process of the first battery cell via the charge-discharge connection, to record a discharge voltage time history of the first battery cell; and a calculation unit, calculating a real-time maximal energy storage capacity of the first battery cell, by an electrochemical equation calculated based on the discharge voltage time history and an electrical current time history of the first battery cell during the discharge process. The history of the real-time maximal energy storage capacity of the battery cell may be stored as an identity resume of the battery cell, in a battery resume record device.
    Type: Application
    Filed: May 1, 2023
    Publication date: May 2, 2024
    Applicant: Grace Connection Microelectronics Limited
    Inventor: Pei Wei Chen
  • Publication number: 20230023194
    Abstract: A switch control unit and optical control unit, including: a digital-to-analog converter, being switchable between being coupled to a first sensing unit and being coupled to a drive unit, through a common contact pad; a sensing contact pad, coupled to a second sensing unit; an analog-to-digital converter, for sensing voltages at the contact pads when coupled to the sensing units, wherein each of the sensing units has a minimum working voltage level; and a loop switching unit, coupled between the common contact pad, the analog-to-digital converter, and the sensing contact pad, wherein when the voltage at the common contact pad is substantially higher than the minimum working voltage level, the loop switching unit conducts the common contact pad to the analog-to-digital converter to sense the voltage at the common contact pad, and the digital-to-analog converter enters a high-impedance state such that the digital-to-analog converter does not sense the voltage at the common contact pad.
    Type: Application
    Filed: July 4, 2022
    Publication date: January 26, 2023
    Applicant: Grace Connection Microelectronics Limited
    Inventor: Pei Wei Chen
  • Patent number: 11418159
    Abstract: The present invention provides a differential signal offset adjustment circuit, wherein first and second transistors are respectively coupled between a power supply line and a first current source, and between the power supply line and a second current source. First and second resistors are respectively coupled between the first transistor and a first variable current source, and between the second transistor and a second variable current source. Third and fourth transistors are respectively coupled between a third resistor and a third current source, and between a fourth resistor and a fourth current source, and have input terminals respectively coupled to the first and second resistors. Fifth and sixth transistors are respectively coupled between the power supply line and a fifth current source, and between the power supply line and a sixth current source, and have input terminals respectively coupled to the third and fourth transistors.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: August 16, 2022
    Assignee: GRACE CONNECTION MICROELECTRONICS LIMITED
    Inventors: Pei Wei Chen, Hsien-Ku Chen
  • Patent number: 11327098
    Abstract: During frequency detection, a constant current source outputs an output current to charge a variable capacitor for multi-period. In a calibration mode, according to a comparison result between a cross voltage of the variable capacitor and a reference voltage, a capacitance value of the variable capacitor is adjusted. In a monitor mode, according to a reference frequency and the cross voltage of the variable capacitor, a frequency under test of a circuit under test is detected.
    Type: Grant
    Filed: November 3, 2020
    Date of Patent: May 10, 2022
    Assignee: GRACE CONNECTION MICROELECTRONICS LIMITED
    Inventors: Pei Wei Chen, Fang-Ren Liao
  • Patent number: 11177812
    Abstract: When digital input data disappear temporarily, within a counting period of the counter and pulse generator, an output voltage of the voltage generator rises, a threshold detector compares the output voltage of the voltage generator with a plurality of threshold values to generate a plurality of comparison results, and a logic gate unit generates a control signal according to the comparison results, to a charge pump, so that the charge pump controls the voltage-controlled oscillator to accelerate or decelerate.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: November 16, 2021
    Assignee: GRACE CONNECTION MICROELECTRONICS LIMITED
    Inventors: Pei Wei Chen, Fang-Ren Liao, Po Huang Huang
  • Publication number: 20210328592
    Abstract: When digital input data disappear temporarily, within a counting period of the counter and pulse generator, an output voltage of the voltage generator rises, a threshold detector compares the output voltage of the voltage generator with a plurality of threshold values to generate a plurality of comparison results, and a logic gate unit generates a control signal according to the comparison results, to a charge pump, so that the charge pump controls the voltage-controlled oscillator to accelerate or decelerate.
    Type: Application
    Filed: November 24, 2020
    Publication date: October 21, 2021
    Applicant: Grace Connection Microelectronics Limited
    Inventors: Pei Wei CHEN, Fang-Ren Liao, Po Huang Huang
  • Publication number: 20210218378
    Abstract: The present invention provides a differential signal offset adjustment circuit, wherein first and second transistors are respectively coupled between a power supply line and a first current source, and between the power supply line and a second current source. First and second resistors are respectively coupled between the first transistor and a first variable current source, and between the second transistor and a second variable current source. Third and fourth transistors are respectively coupled between a third resistor and a third current source, and between a fourth resistor and a fourth current source, and have input terminals respectively coupled to the first and second resistors. Fifth and sixth transistors are respectively coupled between the power supply line and a fifth current source, and between the power supply line and a sixth current source, and have input terminals respectively coupled to the third and fourth transistors.
    Type: Application
    Filed: January 13, 2021
    Publication date: July 15, 2021
    Applicant: Grace Connection Microelectronics Limited
    Inventors: Pei Wei Chen, Hsien-Ku Chen