Patents by Inventor Pei-Yi Shen

Pei-Yi Shen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8652899
    Abstract: The present invention provides a pixel structure including a substrate, a patterned electrode disposed on the substrate, a first insulating layer disposed on the patterned electrode, a common electrode disposed on the first insulating layer, a second insulating layer disposed on the common electrode, and a drain disposed on the second insulating layer. The first insulating layer has a first through hole, and the second insulating layer has a second through hole. The drain includes a first portion electrically connected to the patterned electrode via the first through hole and the second through hole, and a second portion extending onto the common electrode. The common electrode is coupled with the patterned electrode to form a first storage capacitor and is coupled with the second portion to form a second storage capacitor.
    Type: Grant
    Filed: August 14, 2013
    Date of Patent: February 18, 2014
    Assignee: AU Optronics Corp.
    Inventors: Chien-Chih Lee, Pei-Yi Shen, Ching-Yang Cheng, Shu-Ming Huang
  • Publication number: 20130323889
    Abstract: The present invention provides a pixel structure including a substrate, a patterned electrode disposed on the substrate, a first insulating layer disposed on the patterned electrode, a common electrode disposed on the first insulating layer, a second insulating layer disposed on the common electrode, and a drain disposed on the second insulating layer. The first insulating layer has a first through hole, and the second insulating layer has a second through hole. The drain includes a first portion electrically connected to the patterned electrode via the first through hole and the second through hole, and a second portion extending onto the common electrode. The common electrode is coupled with the patterned electrode to form a first storage capacitor and is coupled with the second portion to form a second storage capacitor.
    Type: Application
    Filed: August 14, 2013
    Publication date: December 5, 2013
    Applicant: AU Optronics Corp.
    Inventors: Chien-Chih Lee, Pei-Yi Shen, Ching-Yang Cheng, Shu-Ming Huang
  • Patent number: 8575612
    Abstract: The present invention provides a pixel structure including a substrate, a patterned electrode disposed on the substrate, a first insulating layer disposed on the patterned electrode, a common electrode disposed on the first insulating layer, a second insulating layer disposed on the common electrode, and a drain disposed on the second insulating layer. The first insulating layer has a first through hole, and the second insulating layer has a second through hole. The drain includes a first portion electrically connected to the patterned electrode via the first through hole and the second through hole, and a second portion extending onto the common electrode. The common electrode is coupled with the patterned electrode to form a first storage capacitor and is coupled with the second portion to form a second storage capacitor.
    Type: Grant
    Filed: May 2, 2012
    Date of Patent: November 5, 2013
    Assignee: AU Optronics Corp.
    Inventors: Chien-Chih Lee, Pei-Yi Shen, Ching-Yang Cheng, Shu-Ming Huang
  • Publication number: 20130015449
    Abstract: The present invention provides a pixel structure including a substrate, a patterned electrode disposed on the substrate, a first insulating layer disposed on the patterned electrode, a common electrode disposed on the first insulating layer, a second insulating layer disposed on the common electrode, and a drain disposed on the second insulating layer. The first insulating layer has a first through hole, and the second insulating layer has a second through hole. The drain includes a first portion electrically connected to the patterned electrode via the first through hole and the second through hole, and a second portion extending onto the common electrode. The common electrode is coupled with the patterned electrode to form a first storage capacitor and is coupled with the second portion to form a second storage capacitor.
    Type: Application
    Filed: May 2, 2012
    Publication date: January 17, 2013
    Inventors: Chien-Chih Lee, Pei-Yi Shen, Ching-Yang Cheng, Shu-Ming Huang
  • Patent number: 7889301
    Abstract: An array substrate adopted for a liquid crystal display (LCD) device and the liquid crystal display device are provided. The array substrate includes a substrate, a plurality of scan lines, a plurality of data lines, a plurality of switching devices, and an insulating layer, wherein the insulating layer is deposited above the scan lines and the data lines, and has a plurality of free ends. A pair of the free ends faces each other and defines a broken region, and each free end has a tilt down profile with a decreasing width facing the broken region. The profile can avoid the short circuiting between the two adjacent array pixels, which is caused by the residual reflective electrode during the process.
    Type: Grant
    Filed: May 21, 2008
    Date of Patent: February 15, 2011
    Assignee: Au Optronics Corp.
    Inventors: Chia-Chun Tai, Pei-Yi Shen, Hsin-Yi Lai
  • Publication number: 20090174858
    Abstract: An array substrate adapted for a liquid crystal display (LCD) device and the liquid crystal display device are provided. The LCD device includes an opposing substrate, an array substrate, and a liquid crystal layer. The array substrate is disposed opposite to the opposing substrate, and the liquid crystal layer is filled therebetween. The array substrate includes a substrate, a plurality of scan lines, a plurality of data lines, a plurality of switching devices, and an insulating layer. The scan lines are substantially perpendicular to the data lines to define a plurality of array pixels. The switching devices are connected to the corresponding scan lines and the data lines. The insulating layer is deposited above the scan lines and the data lines, and has a plurality of free ends. Two of the free ends define a broken region. Each of the free ends has a tilt down profile with a decreasing width facing the broken region.
    Type: Application
    Filed: May 21, 2008
    Publication date: July 9, 2009
    Applicant: AU OPTRONICS CORP.
    Inventors: Chia-Chun Tai, Pei-Yi Shen, Hsin-Yi Lai