Patents by Inventor Pei YUAN

Pei YUAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250136905
    Abstract: A method is provided for more effectively agitating a vibration responsive liquid in a container to enhance the qualities of the liquid. Vibration energy that is within the audio frequency spectrum and that corresponds to one or more resonant frequencies of the liquid filled container is coupled to the wall of the container. One or more vibration responsive sensors deployed in or on a container containing the vibration responsive liquid are used to determine the container's resonant frequencies. The method is particularly used in the aging of alcoholic beverages.
    Type: Application
    Filed: January 3, 2025
    Publication date: May 1, 2025
    Applicant: Meyer Sound Laboratories, Incorporated
    Inventors: John D Meyer, Katrin M. Rawks, Jon Arneson, Paul Kohut, Roger Schwenke, Pei-Yuan Liu, Carlo Zuccatti
  • Patent number: 12286706
    Abstract: The present disclosure relates to exclusion rings for use in processing a semiconductor substrate in a processing chamber, such as a chemical vapor deposition chamber. The exclusion ring includes an alignment structure that cooperates with an alignment structure on a platen on which the exclusion ring will rest during processing of the wafer. The first alignment structure includes a guiding surface which promotes the reception of and positioning of the second alignment structure within the first alignment structure. Methods of utilizing the described exclusion rings are also described.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: April 29, 2025
    Assignee: Taiwan Semiconductor Manufacturing CO., Ltd.
    Inventors: Ming-Yi Shen, Hsin-Lin Wu, Yao-Fong Dai, Pei-Yuan Tai, Chin-Wei Chen, Yin-Tun Chou, Yuan-Hsin Chi, Sheng-Yuan Lin
  • Publication number: 20250120842
    Abstract: A nasal dilator includes a connecting strip having two insertion portions on left and right sides thereof. The insertion portions each have two support portions. At least one end of each of the support portions has a support plate. An outer periphery of the support plate is provided with a soft pad that is elastically deformable to fit a user's nasal cavity.
    Type: Application
    Filed: October 11, 2023
    Publication date: April 17, 2025
    Inventor: PEI YUAN WU
  • Publication number: 20250094849
    Abstract: A qubit mapping method is performed by a computer device. The method includes: obtaining a coupling graph corresponding to a quantum device, each vertex in the coupling graph representing one qubit in the quantum device, an edge between two vertexes representing that a two-qubit gate is allowed to directly act on qubits corresponding to the two vertexes; generating at least two connected subgraphs based on the coupling graph, a quantity of vertexes of each connected subgraph being greater than or equal to 2 and less than or equal to a routing number of the coupling graph, and a sum of quantities of vertexes of the at least two connected subgraphs being equal to a constant multiple of a quantity of vertexes of the coupling graph; and performing qubit mapping on a logic circuit based on the at least two connected subgraphs, to obtain a corresponding hardware compilable circuit.
    Type: Application
    Filed: July 9, 2024
    Publication date: March 20, 2025
    Inventors: Pei YUAN, Shengyu ZHANG
  • Publication number: 20250046367
    Abstract: A memory circuit includes an array including a plurality of memory cells arranged across a plurality of columns and a plurality of voltage control circuits, each of the plurality of voltage control circuits operatively coupled to the memory cells of a corresponding one of the plurality of columns. Each of the plurality of voltage control circuits includes a first portion configured to provide a first voltage drop in coupling a supply voltage to the memory cells of the corresponding column and a second portion configured to provide a second voltage drop in coupling the supply voltage to the memory cells of the corresponding column. The first voltage drop is substantially smaller than the second voltage drop.
    Type: Application
    Filed: February 20, 2024
    Publication date: February 6, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kao-Cheng Lin, Yen-Huei Chen, Wei Min Chan, Hidehiro Fujiwara, Wei-Cheng Wu, Pei-Yuan Li, Chien-Chen Lin, Shang Lin Wu
  • Patent number: 12205634
    Abstract: The present disclosure provides an electronic circuit, a memory device, and a method for operating an electronic circuit. An electronic circuit comprises a driver circuit configured to provide a drive voltage to a word line of the electronic circuit, a suppression circuit electrically connected to the driver circuit and the word line, and a control circuit electrically connected to the suppression circuit. The suppression circuit is configured to generate a voltage drop in the drive voltage. The control circuit controls the suppression circuit.
    Type: Grant
    Filed: February 15, 2022
    Date of Patent: January 21, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wei-Cheng Wu, Pei-Yuan Li, Kao-Cheng Lin, Chien Hui Huang, Yung-Ning Tu
  • Publication number: 20250024671
    Abstract: A memory device is provided which includes a first memory cell including a first transistor and a second transistor coupled to the first transistor in parallel. Gates of the first transistor and the second transistor are coupled to each other, and the gates of the first transistor and the second transistor pass different layers and overlap with each other. Types of the first transistor and the second transistor are the same.
    Type: Application
    Filed: July 11, 2023
    Publication date: January 16, 2025
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien Hui Huang, Kao-Cheng LIN, Wei Min CHAN, Shang Lin WU, Chia-Chi HUNG, Wei-Cheng WU, Chia-Che CHUNG, Pei-Yuan LI, Chien-Chen LIN, Yung-Ning TU, Yen Lin CHUNG
  • Patent number: 12187991
    Abstract: An apparatus for modifying a responsive liquid held in a barrel or other liquid container includes a transducer for producing vibration energy within the audio frequency range in response to an audio signal input and a coupler affixed to the transducer such that vibration energy produced in the transducer is transferred to the coupling device. The coupling device has a pusher end that extends beyond the front plane of the transducer and that contacts and pushes against the barrel wall when the apparatus is tied to the barrel wall. By determining the resonances of the liquid-filled barrel, audio input signals having sufficiently high levels at determined resonant frequencies can be chosen to achieve a maximum response in the liquid contained in the barrel. The apparatus is particularly suited for the sonic aging of whisky.
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: January 7, 2025
    Assignee: Meyer Sound Laboratories, Incorporated
    Inventors: John D. Meyer, Katrin M. Rawks, Jon Arneson, Paul Kohut, Roger Schwenke, Pei-Yuan Liu, Carlo Zuccatti
  • Publication number: 20240395316
    Abstract: A memory device is provided. The memory device comprises a memory cell, a first power rail and a suppressing circuit. The memory cell is coupled to a word line. The first power rail transmits a first supply voltage. The suppressing circuit comprises a first transistor and a second transistor. The first transistor is diode-connected, coupled to the word line, and disposed at a first layer. The second transistor is diode-connected coupled between the first transistor and the first power rail, and disposed at a second layer under the first layer. The first transistor and the second transistor overlap with each other in a layout view.
    Type: Application
    Filed: May 22, 2023
    Publication date: November 28, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-Chen LIN, Wei Min CHAN, Kao-Cheng LIN, Wei-Cheng WU, Pei-Yuan LI
  • Publication number: 20240386947
    Abstract: Disclosed herein are related to memory device including an adaptive word line control circuit. In one aspect, the memory device includes a memory cell and a word line driver coupled to the memory cell through a word line. In one aspect, the memory device includes an adaptive word line control circuit including two or more diodes connected in series, where one of the two or more diodes is coupled to the word line.
    Type: Application
    Filed: July 26, 2024
    Publication date: November 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Chen Lin, Pei-Yuan Li, Hsiang-Yun Lin, Shang Lin Wu, Wei Min Chan
  • Publication number: 20240382098
    Abstract: A device for measuring blood pressure receives a vibration signal from a vibration sensor which is used to measure a target area. The device then converts the vibration signal into a digital signal and performs a filtering process on the digital signal. The filtering process involves removing noise around the principal component wave that corresponds to the pulsation of the target area within a specific range in the digital signal. Subsequently, based on the digital signal that has been filtered, the device determines a systolic pressure determination time point and a diastolic pressure determination time point to generate a blood pressure measurement result.
    Type: Application
    Filed: September 19, 2023
    Publication date: November 21, 2024
    Inventors: Kun-I LIN, Pei Yuan Tsai, Shuo Cheng Chou
  • Publication number: 20240362174
    Abstract: A driver adaptable to a debugging system includes a driver controller, and a driver general-purpose input and output (GPIO) controlled by the driver controller. The driver GPIO directly transfers a debug log of status messages of a touchscreen to a host general-purpose input and output (GPIO) of a host without handshaking between the driver and the host.
    Type: Application
    Filed: April 29, 2023
    Publication date: October 31, 2024
    Inventors: Yu-Nian Ou, Chun-Kai Chuang, Pei-Yuan Hung, Yu-Hsiang Lin
  • Patent number: 12106800
    Abstract: Disclosed herein are related to memory device including an adaptive word line control circuit. In one aspect, the memory device includes a memory cell and a word line driver coupled to the memory cell through a word line. In one aspect, the memory device includes an adaptive word line control circuit including two or more diodes connected in series, where one of the two or more diodes is coupled to the word line.
    Type: Grant
    Filed: February 16, 2022
    Date of Patent: October 1, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-Chen Lin, Pei-Yuan Li, Hsiang-Yun Lin, Shang Lin Wu, Wei Min Chan
  • Publication number: 20240312492
    Abstract: An integrated circuit (IC) device includes a plurality of memory segments. Each memory segment includes a plurality of memory cells, and a local bit line electrically coupled to the plurality of memory cells and arranged on a first side of the IC device. The IC device further includes a global bit line electrically coupled to the plurality of memory segments, and arranged on a second side of the IC device. The second side is opposite the first side in a thickness direction of the IC device.
    Type: Application
    Filed: August 8, 2023
    Publication date: September 19, 2024
    Inventors: Yen Lin CHUNG, Kao-Cheng LIN, Wei-Cheng WU, Pei-Yuan LI, Chien-Chen LIN, Chun-Tse CHOU, Chien Hui HUANG, Yung-Ning TU, Shang Lin WU, Chia-Che CHUNG, Chia-Chi HUNG, Wei Min CHAN, Yen-Huei CHEN
  • Publication number: 20240281694
    Abstract: This application provides a quantum circuit optimization method performed by an electronic device, and relates to quantum computing technologies. The method includes: transforming a to-be-optimized quantum circuit into a to-be-processed unitary matrix, and decomposing the to-be-processed unitary matrix iteratively, to obtain a first quantity of qubit uniformly controlled gates; decomposing each qubit uniformly controlled gate into a second quantity of qubit diagonal unitary matrices and a third quantity of single-qubit gates; determining, under constraints of a connected graph, a matching quantum circuit corresponding to each qubit diagonal unitary matrix; integrating the second quantity of matching quantum circuits and the third quantity of single-qubit gates, to obtain a target quantum circuit of each qubit uniformly controlled gate; and connecting the first quantity of target quantum circuits, to obtain an optimized quantum circuit.
    Type: Application
    Filed: March 19, 2024
    Publication date: August 22, 2024
    Inventors: Pei YUAN, Shengyu Zhang
  • Publication number: 20240274728
    Abstract: The present invention discloses an optical bandpass filter structure targeting an arbitrary combination of the spectral ranges of R (red), G (green), B (blue) and IR (infrared) light, which comprises a substrate that is a wafer-based semiconductor sensing element, and a filter layer that is formed on one side of the substrate. The filter layer includes a plurality of basic units organized as a two-dimensional array, in which each of the basic units is composed of a plurality of pixel filter films fabricated by a vacuum coating method.
    Type: Application
    Filed: February 13, 2024
    Publication date: August 15, 2024
    Applicant: KingRay Technology Co., Ltd.
    Inventors: Cheng-Hsing Tsou, Wei-Hao Cheng, Pei-Yuan Ni
  • Patent number: 12046686
    Abstract: The present invention discloses an optical bandpass filter structure targeting an arbitrary combination of the spectral ranges of R (red), G (green), B (blue) and IR (infrared) light, which comprises a substrate that is a wafer-based semiconductor sensing element, and a filter layer that is formed on one side of the substrate. The filter layer includes a plurality of basic units organized as a two-dimensional array, in which each of the basic units is composed of a plurality of pixel filter films fabricated by a vacuum coating method.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: July 23, 2024
    Inventors: Cheng-Hsing Tsou, Wei-Hao Cheng, Pei-Yuan Ni
  • Publication number: 20240185586
    Abstract: Examples of electronic devices are described herein. In some examples, an electronic device includes a processor to generate an evaluation image dataset to determine precision of a machine learning object detection model. In some examples, the processor is to run the evaluation image dataset on the object detection model to identify a misdetection region in the evaluation image dataset. In some examples, the processor is to generate a training image dataset to adjust the object detection model based on the identified misdetection region.
    Type: Application
    Filed: April 13, 2021
    Publication date: June 6, 2024
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Hong-Wei Chou, Pei-Yuan Chien, Peter Siyuan Zhang
  • Publication number: 20240178749
    Abstract: A voltage convertor module includes a lead-frame, a unitary bare die and a molding body. The lead-frame can have a plurality of electrodes including an input voltage electrode, an output voltage electrode, a ground electrode and a controlling electrode. The unitary bare die is disposed only on the lead-frame, where a plurality of pads of the unitary bare die are electrically connected to the electrodes of the lead-frame correspondingly. The unitary bare die includes the plurality of pads, a buck controller block, a first switching unit block, a second switching unit block, a feedback unit block and a plurality of routing structures.
    Type: Application
    Filed: November 21, 2023
    Publication date: May 30, 2024
    Applicant: CYNTEC CO., LTD.
    Inventors: Chih-Tai Cheng, Pei-Yuan Chen
  • Publication number: 20240143112
    Abstract: A touch sensing apparatus includes a panel with touch detection function and a touch detection circuitry. The touch detection circuitry is coupled to the panel, and is configured to detect a touch operation on the panel, record an error event of the touch sensing apparatus, and write the error event into an external storage medium via a data transmission interface thereof.
    Type: Application
    Filed: October 28, 2022
    Publication date: May 2, 2024
    Inventors: Yu Nian OU, Chun Kai CHUANG, Pei-Yuan HUNG, Yung Hsiang LIN