Patents by Inventor Peijian Zhang

Peijian Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240038853
    Abstract: The MOS device with resistive field plate for realizing conductance modulation field effect in the present invention is based on the existing trench gate MOS device, and a semi-insulating resistive field plate electrically connected to the trench gate structure and the drain structure is added in the drift region, where the trench gate structure can control the on-off of the MOS channel, and the semi-insulating resistive field plate can adjust the doping concentration of the drift region to modulate the conductance of the on-state drift region and the distribution of off-state high-voltage blocking electric field, thus a lower on-resistance can be obtained. In addition, the modern 2.5-dimensional processing technology based on deep trench etching is adopted in the present invention, which is conducive to the miniaturization design and high density design of the structure and is more suitable for the More than Moore (beyond Moore) development of modern integrated semiconductor devices.
    Type: Application
    Filed: April 26, 2021
    Publication date: February 1, 2024
    Applicant: NO.24 RESEARCH INSTITUTE OF CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION
    Inventors: Kaizhou TAN, Tian XIAO, Jiahao ZHANG, Yonghui YANG, Xiaoquan LI, Pengfei WANG, Ying PEI, Guangbo LI, Hequan JIANG, Peijian ZHANG, Sheng QIU, Liang CHEN, Wei CUI
  • Publication number: 20230411464
    Abstract: A shared-dielectric MOSFET device with a resistive-field-plate and a preparation method are provided. In the shared-dielectric MOSFET device, the semi-insulating resistive-field-plate electrically connected to the trench gate structure and the drain structure is introduced in the drift region of the existing trench gate MOS devices, and when the trench gate structure controls the MOS channel to be turned on or turned off, the semi-insulating resistive-field-plate can adjust the doping concentration of the drift region, to modulate the conductance of the on-state drift region and the distribution of a off-state high-voltage blocking electric field, thereby obtaining a lower on-resistance. Meanwhile, in the preparation method of the present disclosure, the modern 2.
    Type: Application
    Filed: November 1, 2021
    Publication date: December 21, 2023
    Applicant: NO.24 RESEARCH INSTITUTE OF CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION
    Inventors: Kaizhou TAN, Tian XIAO, Jiahao ZHANG, Xiaoquan LI, Pengfei WANG, Ying PEI, Guangbo LI, Yonghui YANG, Hequan JIANG, Peijian ZHANG, Sheng QIU, Liang CHEN, Wei CUI
  • Patent number: 11848062
    Abstract: A voltage control method and a voltage control circuit for an anti-fuse memory array, including: obtaining a storage data address, dividing the storage data address into multiple subdata addresses, decoding each subdata address to obtain a corresponding group of decoder output signals, converting the corresponding group of decoder output signals into a group of control signals by a corresponding group of high voltage converters; connecting multiple groups of data selectors in series, outputting selection voltages input to each group of data selectors to an anti-fuse unit under the control of the corresponding group of control signals; programming or reading an anti-fuse unit; the selection voltages include one of a programming selection voltage, a reading selection voltage, and a non-designated selection voltage. The present disclosure reduces the number of transistors and saves layout areas when the programming or reading operation is performed.
    Type: Grant
    Filed: September 1, 2020
    Date of Patent: December 19, 2023
    Assignee: NO.24 RESEARCH INSTITUTE OF CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION
    Inventors: Yan Wang, Peijian Zhang, Mingyuan Xu, Xian Chen, Feiyu Jiang, Xiyi Liao, Sheng Qiu, Zhengyuan Zhang, Ruzhang Li, Hequan Jiang, Yonghong Dai
  • Publication number: 20230197178
    Abstract: A voltage control method and a voltage control circuit for an anti-fuse memory array, including: obtaining a storage data address, dividing the storage data address into multiple subdata addresses, decoding each subdata address to obtain a corresponding group of decoder output signals, converting the corresponding group of decoder output signals into a group of control signals by a corresponding group of high voltage converters; connecting multiple groups of data selectors in series, outputting selection voltages input to each group of data selectors to an anti-fuse unit under the control of the corresponding group of control signals; programming or reading an anti-fuse unit; the selection voltages include one of a programming selection voltage, a reading selection voltage, and a non-designated selection voltage. The present disclosure reduces the number of transistors and saves layout areas when the programming or reading operation is performed.
    Type: Application
    Filed: September 1, 2020
    Publication date: June 22, 2023
    Applicant: NO.24 RESEARCH INSTITUTE OF CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION
    Inventors: Yan WANG, Peijian ZHANG, Mingyuan XU, Xian CHEN, Feiyu JIANG, Xiyi LIAO, Sheng QIU, Zhengyuan ZHANG, Ruzhang LI, Hequan JIANG, Yonghong DAI
  • Patent number: D857177
    Type: Grant
    Filed: April 25, 2018
    Date of Patent: August 20, 2019
    Inventor: Peijian Zhang
  • Patent number: D861139
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: September 24, 2019
    Inventor: Peijian Zhang
  • Patent number: D918346
    Type: Grant
    Filed: May 11, 2019
    Date of Patent: May 4, 2021
    Inventor: Peijian Zhang
  • Patent number: D926294
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: July 27, 2021
    Inventor: Peijian Zhang
  • Patent number: D973847
    Type: Grant
    Filed: June 2, 2020
    Date of Patent: December 27, 2022
    Inventor: Peijian Zhang