Patents by Inventor Peijun Ding

Peijun Ding has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230298789
    Abstract: A magnetic thin film laminated structure includes a first layer structure and a second layer structure stacked on the first layer structure. The first layer structure includes an adhesive layer on a substance, the adhesive layer being made of a material having compressive stress, at least one pair of layers on the adhesive layer, each pair of the at least one pair of layers including a magnetic film layer and an isolation layer, and an additional magnetic film layer on the at least one pair of layers. The second layer structure includes another adhesive layer on the first layer structure, another at least one pair of layers on the another adhesive layer, each pair of the another at least one pair of layers including a magnetic film layer and an isolation layer, and another additional magnetic film layer on the another at least one pair of layers.
    Type: Application
    Filed: May 26, 2023
    Publication date: September 21, 2023
    Inventors: Yujie YANG, Peijun DING, Tongwen ZHANG, Wei XIA, Hougong WANG
  • Patent number: 11699541
    Abstract: A deposition method includes depositing an adhesive layer on a workpiece to be processed and depositing a magnetic/isolated unit, where the magnetic/isolation unit includes at least one pair of a magnetic film layer and an isolation layer that are alternately disposed. The deposition method of the magnetic thin film laminated structure, the magnetic thin film laminated structure and the micro-inductive device provided by the disclosure can increase a total thickness of the magnetic thin film laminated structure, thereby broadening the application frequency range of the inductive device fabricated thereby.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: July 11, 2023
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Yujie Yang, Peijun Ding, Tongwen Zhang, Wei Xia, Hougong Wang
  • Patent number: 11328940
    Abstract: A degassing chamber and a semiconductor processing apparatus are provided. The degassing chamber includes a chamber; a substrate container, movable within the chamber in a vertical direction; and a heating component, disposed within the chamber. A substrate transferring opening is formed through a sidewall of the chamber for transferring substrates into or out of the chamber. The heating component includes a first light source component and a second light source component. The chamber is divided into a first chamber and a second chamber by the substrate transferring opening. The first light source component is located in the first chamber, and the second light source component is located in the second chamber. The first light source component and the second light source component are provided for heating a substrate in the substrate container.
    Type: Grant
    Filed: March 26, 2019
    Date of Patent: May 10, 2022
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Qiang Jia, Peijun Ding, Mengxin Zhao, Hougong Wang
  • Patent number: 11107699
    Abstract: A semiconductor manufacturing process is provided. A trench is formed in a semiconductor structure and an oxide layer is deposited on sidewalls of the trench. A solid-state by-product layer is formed on surfaces of the trench by introducing a first etchant gas to react with a naturally occurred oxide layer at the bottom of the trench and the deposited oxide layer. The solid-state by-product layer has a thickness on the bottom less than a thickness on the sidewalls. A second etchant gas is introduced into the trench to react with the solid-state by-product layer, thereby providing a thinned solid-state by-product layer on the sidewalls to protect the deposited oxide layer. By a heating process, the thinned solid-state by-product layer is removed from the sidewalls of the trench, exposing the deposited oxide layer and a surface portion of the semiconductor structure in the trench.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: August 31, 2021
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Peijun Ding, Bo Zheng, Zhenguo Ma, Chun Wang, Jing Shi, Xin Wu, Xiaojuan Wang
  • Patent number: 10984993
    Abstract: A plasma processing apparatus includes a chamber (20) and a target (25) above the chamber (20). The surface of the target (25) contacts the processing area of the chamber (20). The chamber (20) includes an insulating sub-chamber (21) and a first conductive sub-chamber (22), which are superposed. The first conductive sub-chamber (22) is provided under the insulating sub-chamber (21). The insulating sub-chamber (21) is made of insulating material, and the first conductive sub-chamber (22) is made of metal material. A Faraday shield component (10) which is made of metal material or insulating material electroplated with conductive coatings and includes at least one slit is provided in the insulating sub-chamber (21). An inductance coil (13) surrounds the exterior of the insulating sub-chamber (21). The problem about the wafer contamination due to particles formed on the surface of the coil during the sputtering process can be solved by using the plasma processing apparatus.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: April 20, 2021
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Peng Chen, Mengxin Zhao, Gang Wei, Liang Zhang, Bai Yang, Guilong Wu, Peijun Ding
  • Patent number: 10886142
    Abstract: A method includes maintaining a pressure in the process chamber at a threshold before and after a wafer is transferred into the process chamber and during the annealing process of the wafer. Not only the temperature fluctuation caused by the turbulent flow of the gas during the annealing process of the wafer can be avoided, but also the time for the temperature in the chamber to recover and stabilize can be shortened, thereby improving the equipment productivity.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: January 5, 2021
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Zhimin Bai, Qiang Li, Bin Deng, Yuchun Deng, Hougong Wang, Peijun Ding
  • Publication number: 20200118836
    Abstract: A semiconductor manufacturing process is provided. A trench is formed in a semiconductor structure and an oxide layer is deposited on sidewalls of the trench. A solid-state by-product layer is formed on surfaces of the trench by introducing a first etchant gas to react with a naturally occurred oxide layer at the bottom of the trench and the deposited oxide layer. The solid-state by-product layer has a thickness on the bottom less than a thickness on the sidewalls. A second etchant gas is introduced into the trench to react with the solid-state by-product layer, thereby providing a thinned solid-state by-product layer on the sidewalls to protect the deposited oxide layer. By a heating process, the thinned solid-state by-product layer is removed from the sidewalls of the trench, exposing the deposited oxide layer and a surface portion of the semiconductor structure in the trench.
    Type: Application
    Filed: December 13, 2019
    Publication date: April 16, 2020
    Inventors: Peijun DING, Bo ZHENG, Zhenguo MA, Chun WANG, Jing SHI, Xin WU, Xiaojuan WANG
  • Patent number: 10622145
    Abstract: The present disclosure provides a magnetic thin film deposition chamber and a thin film deposition apparatus. The magnetic thin film deposition chamber includes a main chamber and a bias magnetic field device. A base pedestal is disposed in the main chamber for carrying a to-be-processed workpiece. The bias magnetic field device is configured for forming a horizontal magnetic field above the base pedestal, and the horizontal magnetic field is used to provide an in-plane anisotropy to a magnetized film layer deposited on the to-be-processed workpiece. The thin film deposition chamber provided in present disclosure is capable of forming a horizontal magnetic field above the base pedestal that is sufficient to induce an in-plane anisotropy to the magnetic thin film.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: April 14, 2020
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Yujie Yang, Tongwen Zhang, Wei Xia, Peijun Ding, Hougong Wang
  • Patent number: 10622224
    Abstract: A precleaning chamber (100, 200, 300) and a plasma processing apparatus, comprising a cavity (20) and a dielectric window (21, 21?) disposed at the top of the cavity (20), a base (22) and a process assembly (24) surrounding the base (22) are disposed in the precleaning chamber (100, 200, 300), and the base (22), the process assembly (24) and the dielectric window (21, 21?) together form a process sub-cavity (211) above the base (22); and a space of the cavity (20) located below the base (22) is used as a loading/unloading sub-cavity (202), the precleaning chamber (100, 200, 300) further comprises a gas is device (32), the gas inlet device (32) comprises a gas inlet (323), and the gas inlet (323) is configured to directly transport a process gas into the process sub-cavity (211) from above the process assembly (24).
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: April 14, 2020
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Qing She, Peng Chen, Mengxin Zhao, Peijun Ding, Kui Xu, Guodong Bian
  • Publication number: 20190259628
    Abstract: A method includes maintaining a pressure in the process chamber at a threshold before and after a wafer is transferred into the process chamber and during the annealing process of the wafer. Not only the temperature fluctuation caused by the turbulent flow of the gas during the annealing process of the wafer can be avoided, but also the time for the temperature in the chamber to recover and stabilize can be shortened, thereby improving the equipment productivity.
    Type: Application
    Filed: May 1, 2019
    Publication date: August 22, 2019
    Inventors: Zhimin BAI, Qiang LI, Bin DENG, Yuchun DENG, Hougong WANG, Peijun DING
  • Patent number: 10381202
    Abstract: Embodiments of the invention provide a magnetron and a magnetron sputtering device, including an inner magnetic pole and an outer magnetic pole with opposite polarities. Both the inner magnetic pole and the outer magnetic pole comprise multiple spirals. The spirals of the outer magnetic pole surround the spirals of the inner magnetic pole, and a gap exists therebetween. In addition, the gap has different widths in different locations from a spiral center to an edge. Moreover, both the spirals of the outer magnetic pole and the spirals of the inner magnetic pole follow a polar equation: r=a?n+b(cos ?)m+c(tan ?)k+d, 0<=n<=2, 0<=m<=2, c=0 or k=0. Because the gap between the inner magnetic pole and the outer magnetic pole has the different widths in a spiral discrete direction, width sizes of the gap in the different locations can be changed to control magnetic field strength distribution in a plane, thus adjusting uniformity of a membrane thickness.
    Type: Grant
    Filed: December 31, 2014
    Date of Patent: August 13, 2019
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Yujie Yang, Qiang Li, Guoqing Qiu, Zhimin Bai, Hougong Wang, Peijun Ding, Feng Lv
  • Publication number: 20190244736
    Abstract: A deposition method includes depositing an adhesive layer on a workpiece to be processed and depositing a magnetic/isolated unit, where the magnetic/isolation unit includes at least one pair of a magnetic film layer and an isolation layer that are alternately disposed. The deposition method of the magnetic thin film laminated structure, the magnetic thin film laminated structure and the micro-inductive device provided by the disclosure can increase a total thickness of the magnetic thin film laminated structure, thereby broadening the application frequency range of the inductive device fabricated thereby.
    Type: Application
    Filed: April 17, 2019
    Publication date: August 8, 2019
    Inventors: Yujie YANG, Peijun DING, Tongwen ZHANG, Wei XIA, Hougong WANG
  • Publication number: 20190244754
    Abstract: The present disclosure provides a magnetic thin film deposition chamber and a thin film deposition apparatus. The magnetic thin film deposition chamber includes a main chamber and a bias magnetic field device. A base pedestal is disposed in the main chamber for carrying a to-be-processed workpiece. The bias magnetic field device is configured for forming a horizontal magnetic field above the base pedestal, and the horizontal magnetic field is used to provide an in-plane anisotropy to a magnetized film layer deposited on the to-be-processed workpiece. The thin film deposition chamber provided in present disclosure is capable of forming a horizontal magnetic field above the base pedestal that is sufficient to induce an in-plane anisotropy to the magnetic thin film.
    Type: Application
    Filed: April 17, 2019
    Publication date: August 8, 2019
    Inventors: Yujie YANG, Tongwen ZHANG, Wei XIA, Peijun DING, Hougong WANG
  • Publication number: 20190218660
    Abstract: The present disclosure provides a degassing method, a degassing chamber, and a semiconductor processing apparatus. The degassing method includes heating a degassing chamber to provide an internal temperature at a preset temperature, and maintaining the internal temperature of the degassing chamber at the preset temperature; and transferring substrates to be degassed into the degassing chamber and heating the substrates for a preset period of time, and taking the substrates out after the preset period of time of the heating. The disclosed degassing method is able to improve the temperature uniformity not only for a same batch of substrates but also for different batches of substrates. In addition, the disclosed degassing method can also realize anytime instant loading/unloading of the substrates to be degassed, thereby increasing the productivity of the equipment.
    Type: Application
    Filed: March 27, 2019
    Publication date: July 18, 2019
    Inventors: Hua YE, Qiang JIA, Yue XU, Bingxuan JIANG, Jue HOU, Pu SHI, Jinguo ZHENG, Lingbei ZONG, Mengxin ZHAO, Peijun DING, Hougong WANG
  • Publication number: 20190221454
    Abstract: A degassing chamber and a semiconductor processing apparatus are provided. The degassing chamber includes a chamber; a substrate container, movable within the chamber in a vertical direction; and a heating component, disposed within the chamber. A substrate transferring opening is formed through a sidewall of the chamber for transferring substrates into or out of the chamber. The heating component includes a first light source component and a second light source component. The chamber is divided into a first chamber and a second chamber by the substrate transferring opening. The first light source component is located in the first chamber, and the second light source component is located in the second chamber. The first light source component and the second light source component are provided for heating a substrate in the substrate container.
    Type: Application
    Filed: March 26, 2019
    Publication date: July 18, 2019
    Inventors: Qiang JIA, Peijun DING, Mengxin ZHAO, Hougong WANG
  • Patent number: 10347470
    Abstract: Embodiments of the invention provide a process chamber and a semiconductor processing apparatus. According to at least one embodiment, the process chamber includes a reaction compartment, a gas introducing system and a wafer transfer device. The reaction compartment is provided in the process chamber and used for performing a process on a wafer, the gas introducing system is used for providing processing gas to the reaction compartment, and the wafer transfer device is used for transferring the wafer into the reaction compartment. A lining ring assembly is provided in the reaction compartment, and is configured such that a flow uniformizing cavity is formed between the lining ring assembly itself and an inner side wall of the reaction compartment, so as to uniformly transport the processing gas, from the gas introducing system, into the reaction compartment through the flow uniformizing cavity.
    Type: Grant
    Filed: December 29, 2014
    Date of Patent: July 9, 2019
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Feng Lv, Fenggang Zhang, Mengxin Zhao, Peijun Ding
  • Patent number: 10287686
    Abstract: The present invention provides a hot plate and substrate processing equipment using the same, wherein the hot plate comprises a central sub hot plate and at least one outer ring sub hot plate located around the central sub hot plate; thermal insulation parts are provided between the central sub hot plate and the outer ring sub hot plate and between two adjacent outer ring sub hot plates, so that the heat conduction between the adjacent sub hot plates can be effectively prevented or reduced by means of the thermal insulation parts. The hot plate and the substrate processing equipment using the same provided in the present invention can effectively compensate for the heat losses in the edge region of the substrate, so as to keep the heating rate the same in each region of the substrate.
    Type: Grant
    Filed: November 23, 2011
    Date of Patent: May 14, 2019
    Assignee: BEIJING NAURA MICROELECTRONICS EQUIPMENT CO., LTD.
    Inventors: Mengxin Zhao, Xu Liu, Peijun Ding, Hougong Wang, Wei Xia, Lihui Wen
  • Publication number: 20180327893
    Abstract: A magnetron sputter reactor for sputtering deposition materials such as tantalum, tantalum nitride and copper, for example and its method of use, in which self-ionized plasma (SIP) sputtering and inductively coupled plasma (ICP) sputtering are promoted, either together or alternately, in the same or different chambers. Also, bottom coverage may be thinned or eliminated by ICP resputtering in one chamber and SIP in another. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. ICP is provided by one or more RF coils which inductively couple RF energy into a plasma. The combined SIP-ICP layers can act as a liner or barrier or seed or nucleation layer for hole. In addition, an RF coil may be sputtered to provide protective material during ICP resputtering. In another chamber an array of auxiliary magnets positioned along sidewalls of a magnetron sputter reactor on a side towards the wafer from the target.
    Type: Application
    Filed: July 11, 2018
    Publication date: November 15, 2018
    Inventors: Peijun DING, Rong TAO, Zheng XU, Daniel C. LUBBEN, Suraj RENGARAJAN, Michael A. MILLER, Arvind SUNDARRAJAN, Xianmin TANG, John C. FORSTER, Jianming FU, Roderick C. MOSELY, Fusen CHEN, Praburam GOPALRAJA
  • Patent number: 10047430
    Abstract: A magnetron sputter reactor for sputtering deposition materials such as tantalum, tantalum nitride and copper, for example, and its method of use, in which self-ionized plasma (SIP) sputtering and inductively coupled plasma (ICP) sputtering are promoted, either together or alternately, in the same or different chambers. Also, bottom coverage may be thinned or eliminated by ICP resputtering in one chamber and SIP in another. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. ICP is provided by one or more RF coils which inductively couple RF energy into a plasma. The combined SIP-ICP layers can act as a liner or barrier or seed or nucleation layer for hole. In addition, an RF coil may be sputtered to provide protective material during ICP resputtering. In another chamber an array of auxiliary magnets positioned along sidewalls of a magnetron sputter reactor on a side towards the wafer from the target.
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: August 14, 2018
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Peijun Ding, Rong Tao, Zheng Xu, Daniel C. Lubben, Suraj Rengarajan, Michael A. Miller, Arvind Sundarrajan, Xianmin Tang, John C. Forster, Jianming Fu, Roderick C. Mosely, Fusen Chen, Praburam Gopalraja
  • Patent number: 9991157
    Abstract: We disclose a method of applying a sculptured layer of material on a semiconductor feature surface using ion deposition sputtering, wherein a surface onto which the sculptured layer is applied is protected to resist erosion and contamination by impacting ions of a depositing layer. A first protective layer of material is deposited on a substrate surface using traditional sputtering or ion deposition sputtering, in combination with sufficiently low substrate bias that a surface onto which the layer is applied is not eroded away or contaminated during deposition of the protective layer. Subsequently, a sculptured second layer of material is applied using ion deposition sputtering at an increased substrate bias, to sculpture a shape from a portion of the first protective layer of material and the second layer of depositing material. The method is particularly applicable to the sculpturing of barrier layers, wetting layers, and conductive layers upon semiconductor feature surfaces.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: June 5, 2018
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Tony Chiang, Gongda Yao, Peijun Ding, Fusen E. Chen, Barry L. Chin, Gene Y. Kohara, Zheng Xu, Hong Zhang