Patents by Inventor Peijun J. Chen

Peijun J. Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7803703
    Abstract: The present invention provides a method of manufacturing a metal silicide electrode (100) for a semiconductor device (110). The method comprises depositing by physical vapor deposition, germanium atoms (120) and transition metal atoms (130) to form a metal-germanium alloy layer (140) on a semiconductor substrate (150). The metal-germanium alloy layer and the semiconductor substrate are reacted to form a metal silicide electrode. Other aspects of the present invention include a method of manufacturing an integrated circuit (400).
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: September 28, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Doufeng Yue, Noel Russell, Peijun J. Chen, Douglas E. Mercer
  • Patent number: 7511350
    Abstract: The invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same. The semiconductor device, among other elements, may include a gate structure located over a substrate, the gate structure including a gate dielectric layer and gate electrode layer. The semiconductor device may further include source/drain regions located in/over the substrate and adjacent the gate structure, and a nickel alloy silicide located in the source/drain regions, the nickel alloy silicide having an amount of indium located therein.
    Type: Grant
    Filed: January 23, 2008
    Date of Patent: March 31, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Peijun J. Chen, Duofeng Yue, Amitabh Jain, Sue Crank, Thomas D. Bonifield, Homi Mogul
  • Publication number: 20080311747
    Abstract: The present invention provides a method of manufacturing a metal silicide electrode (100) for a semiconductor device (110). The method comprises depositing by physical vapor deposition, germanium atoms (120) and transition metal atoms (130) to form a metal-germanium alloy layer (140) on a semiconductor substrate (150). The metal-germanium alloy layer and the semiconductor substrate are reacted to form a metal silicide electrode. Other aspects of the present invention include a method of manufacturing an integrated circuit (400).
    Type: Application
    Filed: August 4, 2008
    Publication date: December 18, 2008
    Applicant: Texas Instruments Incorporated
    Inventors: Doufeng Yue, Noel Russell, Peijun J. Chen, Douglas E. Mercer
  • Patent number: 7435672
    Abstract: The present invention provides a method of manufacturing a metal silicide electrode (100) for a semiconductor device (110). The method comprises depositing by physical vapor deposition, germanium atoms (120) and transition metal atoms (130) to form a metal-germanium alloy layer (140) on a semiconductor substrate (150). The metal-germanium alloy layer and the semiconductor substrate are reacted to form a metal silicide electrode. Other aspects of the present invention include a method of manufacturing an integrated circuit (400).
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: October 14, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Doufeng Yue, Noel Russell, Peijun J. Chen, Douglas E. Mercer
  • Publication number: 20080128837
    Abstract: The invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same. The semiconductor device, among other elements, may include a gate structure located over a substrate, the gate structure including a gate dielectric layer and gate electrode layer. The semiconductor device may further include source/drain regions located in/over the substrate and adjacent the gate structure, and a nickel alloy silicide located in the source/drain regions, the nickel alloy silicide having an amount of indium located therein.
    Type: Application
    Filed: January 23, 2008
    Publication date: June 5, 2008
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Peijun J. Chen, Duofeng Yue, Amitabh Jain, Sue Crank, Thomas D. Bonifield, Homi Mogul
  • Patent number: 7355255
    Abstract: The present invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same. The semiconductor device, among other elements, may include a substrate (110), as well as a nickel silicide region (170) located over the substrate (110), the nickel silicide region (170) having an amount of indium located therein.
    Type: Grant
    Filed: February 26, 2007
    Date of Patent: April 8, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Peijun J. Chen, Duofeng Yue, Amitabh Jain, Sue E. Crank, Thomas D. Bonifield, Homi C. Mogul
  • Patent number: 7344985
    Abstract: The invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same. The semiconductor device, among other elements, may include a gate structure located over a substrate, the gate structure including a gate dielectric layer and gate electrode layer. The semiconductor device may further include source/drain regions located in/over the substrate and adjacent the gate structure, and a nickel alloy silicide located in the source/drain regions, the nickel alloy silicide having an amount of indium located therein.
    Type: Grant
    Filed: October 20, 2006
    Date of Patent: March 18, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Peijun J. Chen, Duofeng Yue, Amitabh Jain, Sue Crank, Thomas D. Bonifield, Homi Mogul
  • Patent number: 7211516
    Abstract: The present invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same. The semiconductor device, among other elements, may include a substrate (110), as well as a nickel silicide region (170) located over the substrate (110), the nickel silicide region (170) having an amount of indium located therein.
    Type: Grant
    Filed: April 1, 2005
    Date of Patent: May 1, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Peijun J. Chen, Duofeng Yue, Amitabh Jain, Sue Crank, Thomas D. Bonifield, Homi Mogul
  • Patent number: 7208398
    Abstract: The present invention provides a method of manufacturing a metal silicide electrode (100) for a semiconductor device (110). The method comprises depositing by physical vapor deposition, halogen atoms (120) and transition metal atoms (130) to form a halogen-containing metal layer (140) on a semiconductor substrate (150). The halogen-containing metal layer and the semiconductor substrate are reacted to form a metal silicide electrode. Other aspects of the present invention include a method of manufacturing an integrated circuit (400) comprising the metal silicide electrode.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: April 24, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Peijun J. Chen, Duofeng Yue, Douglas E. Mercer, Noel Russell
  • Patent number: 7199032
    Abstract: The present invention provides a method of manufacturing a metal silicide electrode (100) for a semiconductor device (110). The method comprises implanting small atoms into an nMOS semiconductor substrate (130) to a depth (132) no greater than about 30 nanometers into the nMOS semiconductor substrate. The method further comprises depositing a transition metal layer (400) over the nMOS semiconductor substrate. The transition metal layer and the nMOS semiconductor substrate are reacted to form the metal silicide electrode. Other aspects of the present invention include a method of manufacturing an integrated circuit (700).
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: April 3, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Duofeng Yue, Peijun J. Chen, Sue Ellen Crank, Thomas D. Bonifield, Jiong-Ping Lu, Jie-Jie Xu
  • Patent number: 7132365
    Abstract: A method of preparing a die comprises treating exposed silicon to form an oxide prior to silicide formation; and depositing metal on the oxide. The metal may comprise titanium, cobalt, nickel, platinum, palladium, tungsten, molybdenum, or combinations thereof on the oxide. The oxide may be less than or equal to about 15 angstroms thick. In various embodiments, treating exposed silicon to form an oxide comprises forming a non-thermal oxide. Treating exposed silicon to form an oxide may also comprise treating the exposed silicon with an oxidizing plasma; alternatively, treating exposed silicon to form an oxide may comprise forming a chemical oxide. In certain other embodiments, treating exposed silicon to form an oxide comprises treating exposed silicon with a solution comprising ammonium hydroxide, hydrogen peroxide, and water; hydrochloric acid, hydrogen peroxide, and water; hydrogen peroxide; ozone; ozonated deionized water; or combinations thereof.
    Type: Grant
    Filed: August 10, 2004
    Date of Patent: November 7, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Sue Ellen Crank, Shirin Siddiqui, Deborah J. Riley, Trace Quentin Hurd, Peijun J. Chen
  • Patent number: 5286340
    Abstract: A process for spatially controlling the etching of a silicon substrate by omic hydrogen. The process may be generally carried out at room temperature. The process involves implanting a boron dopant in selective portions of the silicon substrate followed by etching with atomic hydrogen. The implanted portions exhibit no etching by atomic hydrogen. A silicon device that is produced by this process is disclosed.
    Type: Grant
    Filed: September 13, 1991
    Date of Patent: February 15, 1994
    Assignee: University of Pittsburgh of the Commonwealth System of Higher Education
    Inventors: John T. Yates, Jr., Peijun J. Chen, M. Luigi Colaianni