Patents by Inventor Peijun J. Chen
Peijun J. Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7803703Abstract: The present invention provides a method of manufacturing a metal silicide electrode (100) for a semiconductor device (110). The method comprises depositing by physical vapor deposition, germanium atoms (120) and transition metal atoms (130) to form a metal-germanium alloy layer (140) on a semiconductor substrate (150). The metal-germanium alloy layer and the semiconductor substrate are reacted to form a metal silicide electrode. Other aspects of the present invention include a method of manufacturing an integrated circuit (400).Type: GrantFiled: August 4, 2008Date of Patent: September 28, 2010Assignee: Texas Instruments IncorporatedInventors: Doufeng Yue, Noel Russell, Peijun J. Chen, Douglas E. Mercer
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Patent number: 7511350Abstract: The invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same. The semiconductor device, among other elements, may include a gate structure located over a substrate, the gate structure including a gate dielectric layer and gate electrode layer. The semiconductor device may further include source/drain regions located in/over the substrate and adjacent the gate structure, and a nickel alloy silicide located in the source/drain regions, the nickel alloy silicide having an amount of indium located therein.Type: GrantFiled: January 23, 2008Date of Patent: March 31, 2009Assignee: Texas Instruments IncorporatedInventors: Peijun J. Chen, Duofeng Yue, Amitabh Jain, Sue Crank, Thomas D. Bonifield, Homi Mogul
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Publication number: 20080311747Abstract: The present invention provides a method of manufacturing a metal silicide electrode (100) for a semiconductor device (110). The method comprises depositing by physical vapor deposition, germanium atoms (120) and transition metal atoms (130) to form a metal-germanium alloy layer (140) on a semiconductor substrate (150). The metal-germanium alloy layer and the semiconductor substrate are reacted to form a metal silicide electrode. Other aspects of the present invention include a method of manufacturing an integrated circuit (400).Type: ApplicationFiled: August 4, 2008Publication date: December 18, 2008Applicant: Texas Instruments IncorporatedInventors: Doufeng Yue, Noel Russell, Peijun J. Chen, Douglas E. Mercer
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Patent number: 7435672Abstract: The present invention provides a method of manufacturing a metal silicide electrode (100) for a semiconductor device (110). The method comprises depositing by physical vapor deposition, germanium atoms (120) and transition metal atoms (130) to form a metal-germanium alloy layer (140) on a semiconductor substrate (150). The metal-germanium alloy layer and the semiconductor substrate are reacted to form a metal silicide electrode. Other aspects of the present invention include a method of manufacturing an integrated circuit (400).Type: GrantFiled: July 30, 2004Date of Patent: October 14, 2008Assignee: Texas Instruments IncorporatedInventors: Doufeng Yue, Noel Russell, Peijun J. Chen, Douglas E. Mercer
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Publication number: 20080128837Abstract: The invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same. The semiconductor device, among other elements, may include a gate structure located over a substrate, the gate structure including a gate dielectric layer and gate electrode layer. The semiconductor device may further include source/drain regions located in/over the substrate and adjacent the gate structure, and a nickel alloy silicide located in the source/drain regions, the nickel alloy silicide having an amount of indium located therein.Type: ApplicationFiled: January 23, 2008Publication date: June 5, 2008Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Peijun J. Chen, Duofeng Yue, Amitabh Jain, Sue Crank, Thomas D. Bonifield, Homi Mogul
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Patent number: 7355255Abstract: The present invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same. The semiconductor device, among other elements, may include a substrate (110), as well as a nickel silicide region (170) located over the substrate (110), the nickel silicide region (170) having an amount of indium located therein.Type: GrantFiled: February 26, 2007Date of Patent: April 8, 2008Assignee: Texas Instruments IncorporatedInventors: Peijun J. Chen, Duofeng Yue, Amitabh Jain, Sue E. Crank, Thomas D. Bonifield, Homi C. Mogul
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Patent number: 7344985Abstract: The invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same. The semiconductor device, among other elements, may include a gate structure located over a substrate, the gate structure including a gate dielectric layer and gate electrode layer. The semiconductor device may further include source/drain regions located in/over the substrate and adjacent the gate structure, and a nickel alloy silicide located in the source/drain regions, the nickel alloy silicide having an amount of indium located therein.Type: GrantFiled: October 20, 2006Date of Patent: March 18, 2008Assignee: Texas Instruments IncorporatedInventors: Peijun J. Chen, Duofeng Yue, Amitabh Jain, Sue Crank, Thomas D. Bonifield, Homi Mogul
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Patent number: 7211516Abstract: The present invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same. The semiconductor device, among other elements, may include a substrate (110), as well as a nickel silicide region (170) located over the substrate (110), the nickel silicide region (170) having an amount of indium located therein.Type: GrantFiled: April 1, 2005Date of Patent: May 1, 2007Assignee: Texas Instruments IncorporatedInventors: Peijun J. Chen, Duofeng Yue, Amitabh Jain, Sue Crank, Thomas D. Bonifield, Homi Mogul
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Patent number: 7208398Abstract: The present invention provides a method of manufacturing a metal silicide electrode (100) for a semiconductor device (110). The method comprises depositing by physical vapor deposition, halogen atoms (120) and transition metal atoms (130) to form a halogen-containing metal layer (140) on a semiconductor substrate (150). The halogen-containing metal layer and the semiconductor substrate are reacted to form a metal silicide electrode. Other aspects of the present invention include a method of manufacturing an integrated circuit (400) comprising the metal silicide electrode.Type: GrantFiled: July 30, 2004Date of Patent: April 24, 2007Assignee: Texas Instruments IncorporatedInventors: Peijun J. Chen, Duofeng Yue, Douglas E. Mercer, Noel Russell
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Patent number: 7199032Abstract: The present invention provides a method of manufacturing a metal silicide electrode (100) for a semiconductor device (110). The method comprises implanting small atoms into an nMOS semiconductor substrate (130) to a depth (132) no greater than about 30 nanometers into the nMOS semiconductor substrate. The method further comprises depositing a transition metal layer (400) over the nMOS semiconductor substrate. The transition metal layer and the nMOS semiconductor substrate are reacted to form the metal silicide electrode. Other aspects of the present invention include a method of manufacturing an integrated circuit (700).Type: GrantFiled: July 30, 2004Date of Patent: April 3, 2007Assignee: Texas Instruments IncorporatedInventors: Duofeng Yue, Peijun J. Chen, Sue Ellen Crank, Thomas D. Bonifield, Jiong-Ping Lu, Jie-Jie Xu
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Patent number: 7132365Abstract: A method of preparing a die comprises treating exposed silicon to form an oxide prior to silicide formation; and depositing metal on the oxide. The metal may comprise titanium, cobalt, nickel, platinum, palladium, tungsten, molybdenum, or combinations thereof on the oxide. The oxide may be less than or equal to about 15 angstroms thick. In various embodiments, treating exposed silicon to form an oxide comprises forming a non-thermal oxide. Treating exposed silicon to form an oxide may also comprise treating the exposed silicon with an oxidizing plasma; alternatively, treating exposed silicon to form an oxide may comprise forming a chemical oxide. In certain other embodiments, treating exposed silicon to form an oxide comprises treating exposed silicon with a solution comprising ammonium hydroxide, hydrogen peroxide, and water; hydrochloric acid, hydrogen peroxide, and water; hydrogen peroxide; ozone; ozonated deionized water; or combinations thereof.Type: GrantFiled: August 10, 2004Date of Patent: November 7, 2006Assignee: Texas Instruments IncorporatedInventors: Sue Ellen Crank, Shirin Siddiqui, Deborah J. Riley, Trace Quentin Hurd, Peijun J. Chen
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Patent number: 5286340Abstract: A process for spatially controlling the etching of a silicon substrate by omic hydrogen. The process may be generally carried out at room temperature. The process involves implanting a boron dopant in selective portions of the silicon substrate followed by etching with atomic hydrogen. The implanted portions exhibit no etching by atomic hydrogen. A silicon device that is produced by this process is disclosed.Type: GrantFiled: September 13, 1991Date of Patent: February 15, 1994Assignee: University of Pittsburgh of the Commonwealth System of Higher EducationInventors: John T. Yates, Jr., Peijun J. Chen, M. Luigi Colaianni