Patents by Inventor Peijun Jerry Chen

Peijun Jerry Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230126516
    Abstract: A method of forming a doped silicon nitride film on a surface of a substrate and structures including the doped silicon nitride film are disclosed. Exemplary methods include forming a layer comprising silicon nitride using a first thermal process and forming a layer comprising doped silicon nitride using a second thermal process to thereby form the doped silicon nitride film.
    Type: Application
    Filed: October 24, 2022
    Publication date: April 27, 2023
    Inventors: Xingye Wang, Fu Tang, Eric Jen cheng Liu, Peijun Jerry Chen, YoungChol Byun
  • Publication number: 20090079016
    Abstract: The present invention provides a method for fabricating a dielectric stack in an integrated circuit comprising the steps of (i) forming a high-k dielectric layer on a semiconductor substrate, (ii) subjecting the semiconductor substrate with the high-k dielectric layer to a nitrogen comprising vapor phase reactant and silicon comprising vapor phase reactant in a plasma-enhanced chemical vapor deposition process (PECVD) or a plasma-enhanced atomic layer chemical vapor deposition (PE ALCVD) process. Furthermore, the present invention provides a dielectric stack in an integrated circuit comprising (i) a high-k dielectric layer comprising at least a high-k material, (ii) a dielectric layer comprising at least silicon and nitrogen; (iii) an intermediate layer disposed between the high-k dielectric layer and the dielectric layer, the intermediate layer comprising the high-k material, silicon, and nitrogen.
    Type: Application
    Filed: November 17, 2008
    Publication date: March 26, 2009
    Applicants: Interuniversitair Microelektronica Centrum vzw, ASM America Inc.
    Inventors: Peijun Jerry Chen, Tsai Wilman, Mathieu Caymax, Jan Willem Maes
  • Patent number: 7465626
    Abstract: The present invention provides a method for fabricating a dielectric stack in an integrated circuit comprising the steps of (i) forming a high-k dielectric layer on a semiconductor substrate, (ii) subjecting the semiconductor substrate with the high-k dielectric layer to a nitrogen comprising vapor phase reactant and silicon comprising vapor phase reactant in a plasma-enhanced chemical vapor deposition process (PECVD) or a plasma-enhanced atomic layer chemical vapor deposition (PE ALCVD) process. Furthermore, the present invention provides a dielectric stack in an integrated circuit comprising (i) a high-k dielectric layer comprising at least a high-k material, (ii) a dielectric layer comprising at least silicon and nitrogen; (iii) an intermediate layer disposed between the high-k dielectric layer and the dielectric layer, the intermediate layer comprising the high-k material, silicon, and nitrogen.
    Type: Grant
    Filed: May 25, 2005
    Date of Patent: December 16, 2008
    Assignees: Interuniversitair Microelektronica Centrum vzw, ASM America Inc.
    Inventors: Peijun Jerry Chen, Tsai Wilman, Mathieu Caymax, Jan Willem Maes