Patents by Inventor Peipei HAO

Peipei HAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Clock driving circuit resistant to single-event transient
    Patent number: 10644683
    Abstract: Disclosed in present invention is a clock driving circuit resistant to single-event transient. The clock driving circuit resistant to single-event transient consists of two kinds of inverters: double-input double-output (DIDO) inverter and double-input single-output (DISO) inverter, the specific number of the two kinds of inverters used, and the connection way thereof are determined by the complexity of a designed circuit and a clock design method used by the designed circuit. The DIDO inverter and DISO inverter both comprise two PMOS transistors and two NMOS transistors. In a clock distribution network based on double-input double-output and double-input single-output clock inverters, the probability that single-event transient pulses generated on the DIDO inverter are propagated to clock leaf nodes is zero.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: May 5, 2020
    Assignee: NATIONAL UNIVERSITY OF DEFENSE TECHNOLOGY
    Inventors: Shuming Chen, Peipei Hao, Pengcheng Huang, Bin Liang
  • CLOCK DRIVING CIRCUIT RESISTANT TO SINGLE-EVENT TRANSIENT
    Publication number: 20190089340
    Abstract: Disclosed in present invention is a clock driving circuit resistant to single-event transient. The clock driving circuit resistant to single-event transient consists of two kinds of inverters: double-input double-output (DIDO) inverter and double-input single-output (DISO) inverter, the specific number of the two kinds of inverters used, and the connection way thereof are determined by the complexity of a designed circuit and a clock design method used by the designed circuit. The DIDO inverter and DISO inverter both comprise two PMOS transistors and two NMOS transistors. In a clock distribution network based on double-input double-output and double-input single-output clock inverters, the probability that single-event transient pulses generated on the DIDO inverter are propagated to clock leaf nodes is zero.
    Type: Application
    Filed: March 28, 2017
    Publication date: March 21, 2019
    Applicant: NATIONAL UNIVERSITY OF DEFENSE TECHNOLOGY
    Inventors: Shuming CHEN, Peipei HAO, Pengcheng HUANG, Bin LIANG