Abstract: The display panel includes an active area and a border-frame area located at a periphery of the active area, the active area includes a plurality of sub-pixels and a plurality of data lines connected to the sub-pixels, and the border-frame area includes a testing area and a bonding area; the testing area includes a plurality of testing units that are arranged periodically in a first direction, each of the testing units includes one or more switching transistors, a first electrode of each of the switching transistors is connected to a testing-signal lead wire, and a second electrode is connected to one of the data lines; the bonding area includes a plurality of bonding units that are arranged periodically in the first direction, each of the bonding units includes one or more bonding pads, and each of the bonding pads is connected to one of the data lines.

Abstract: Embodiments disclosed herein include multi-die packages with interconnects between the dies. In an embodiment, an electronic package comprises a package substrate, and a first die over the package substrate. In an embodiment, the first die comprises a first IO bump map, where bumps of the first IO bump map have a first pitch. In an embodiment, the electronic package further comprises a second die over the package substrate. In an embodiment, the second die comprises a second IO bump map, where bumps of the second IO bump map have a second pitch that is different than the first pitch. In an embodiment, the electronic package further comprises interconnects between the first IO bump map and the second IO bump map.

Abstract: Disclosed are a device and a method for transferring the semiconductor component, which aims to accurately measure the movement accuracy of a transfer stamp when transferring semiconductor components using a transfer stamp, thereby improving the alignment accuracy between the transfer stamp and the semiconductor component, ensuring the yield rate of the prepared products, and solving the problem in the related art that after the transfer stamp is aligned with a temporary carrier or a drive circuit backplane, the semiconductor components cannot be guaranteed by only relying on the large stroke up and down movement of the guide rail. The precise picking up of LED chips or accurate placement of them at the predetermined position on the driver circuit backplane results in a decrease in the transfer yield, affecting the technical issues of subsequent related processes.

Abstract: Environmentally friendly, sustainable, and high-performance ultralight composite foams are disclosed. The composite foams are prepared from cellulose nanomaterial, polymeric material, and a crosslinking agent. The fabrication process is simple and uses only water. The composite foams exhibit an elastic strain exceeding the values reported for known nanocellulose-based foams with no reinforcement. The foams exhibit a thermal conductivity superior to that of traditional insulating materials and retain structural integrity after burning.

Abstract: A scan circuit is provided. The scan circuit includes a plurality of stages. A respective stage of the scan circuit includes a respective scan unit configured to provide a control signal to one or more rows of subpixels. A respective scan unit includes a first subcircuit, a second subcircuit, a third subcircuit, a fourth subcircuit. A pull-up node is coupled to the second subcircuit, the third subcircuit, and the fourth subcircuit. A pull-down node is coupled to the second subcircuit, the third subcircuit. The denoising subcircuit is coupled to a pull-up node and the input terminal, or coupled between a third power supply voltage terminal and the pull-down control node.

Abstract: A method of electroplating a stress-free copper film on a substrate includes: providing the substrate; providing an electroplating bath that includes a copper salt, an acid, a leveler, a chlorine compound, an accelerator, a suppressor; and water; heating the electroplating bath to 25 to 60° C.; and electroplating the substrate in the electroplating bath to form the stress-free copper film while maintaining the electroplating bath at 25 to 60° C. The leveler is an organic compound containing an amine group. The method further includes annealing the stress-free copper film at 60-260° C. for 0.5 to 2 hours, or at 60-120° C. for 0.5 to 2 hours. A stress-free electroplated copper film is also disclosed.

Abstract: The present disclosure belongs to the technical field of polymer rubber composites, and specifically relates to a rubber sealing gasket with excellent compression performance and low-temperature performance, and a preparation method and use thereof. The rubber sealing gasket is prepared from the following raw materials in parts by mass: a hydrogenated nitrile butadiene rubber (HNBR): 100 parts; a processing aid: 12.3 parts to 13.7 parts; a reinforcing filler: 45 parts to 65 parts; a vulcanizing agent: 4.8 parts to 5.2 parts; and a co-crosslinking agent: 4.8 parts to 5.2 parts. The rubber sealing gasket prepared by the present disclosure has excellent compression performance and low-temperature performance, meets the performance requirements of rubber sealing gaskets for automobile air-conditioning systems, and can be used in sealing components of automobile air-conditioning systems.

Abstract: An integrated circuit (IC) package, comprising a substrate that comprises a bridge die embedded within a dielectric. A first die comprising a first input/output (I/O) transmitter and a second die comprising a second I/O receiver and electrically coupled to the bridge die. A first signal trace and a first power conductor are within the bridge die. The first signal trace and the first power conductor are electrically coupled to the first I/O transmitter and the second I/O receiver. The first signal trace is to carry a digital signal and the first power conductor to provide a voltage for the second I/O receiver to read the digital signal.

Abstract: The present disclosure provides a driving circuit, a driving method and a display device. The driving circuit includes a first pull-down node, a first control circuit and a pull-up node reset circuit; the first control circuit is configured to control to connect the first pull-down node and the first voltage terminal under the control of the first control signal provided by the first control terminal, so that a potential of the first pull-down node is a valid voltage; the pull-up node reset circuit is configured to control to connect the pull-up node and the second voltage terminal when the potential of the first pull-down node is a valid voltage, so as to reset the potential of the pull-up node.

Abstract: Methods, apparatuses and systems for providing a switching component are disclosed herein. An example switching component may comprise: A switching component comprising: a housing; a carrier body disposed within the housing; a first pair of contact pads disposed on a first surface of the carrier body; and a second pair of contact pads disposed on a second surface of the carrier body, wherein each pair of contact pads is configured to independently make contact with adjacent bridge contact pads in order to actuate an electrical bridge in response to movement of the carrier body.

Abstract: A sleep-regulating tablet allowing release by stages and a preparation method thereof are provided. The tablet structurally consists of a drug-containing delayed-release tablet core, a drug-free stomach-soluble coating, a drug-free enteric coating, a drug-containing immediate-release shell, and a shell stomach-soluble coating sequentially from inside to outside. An ideal dual-stage timed drug release mode may be realized, and is especially suitable for a sleep-regulating drug, such as ramelteon.

Abstract: A Peripheral Component Interconnect express (PCIe) fault auto-repair method is provided. According to the method, when a PCIe link in a system runs, an operation state of the system is monitored by acquiring a Correctable Error (CE) error count and an Uncorrectable Error (UCE) error count in the PCIe link; when the CE error count reaches a corresponding error threshold value, or the UCE error count reaches a corresponding error threshold value, an error device is removed from the system to avoid continuous adverse influence of the error device on operation of the system. Moreover, an SI parameter register of the error device is modified according to pre-stored optimization parameters of all PCIe devices in a server, the SI parameter of the error device is automatically optimized, and the error device is re-accessed to the system after the PCIe fault repair.

Abstract: Environmentally friendly, sustainable, and high-performance ultralight composite foams are disclosed. The composite foams are prepared from cellulose nanomaterial, polymeric material, and a crosslinking agent. The fabrication process is simple and uses only water. The composite foams exhibit an elastic strain exceeding the values reported for known nanocellulose-based foams with no reinforcement. The foams exhibit a thermal conductivity superior to that of traditional insulating materials and retain structural integrity after burning.

Abstract: The present invention provides a 2-polysubstituted aromatic ring-pyrimidine derivative and an optical isomer thereof, or a pharmaceutically acceptable salt or solvate thereof, the compound, and an optical isomer thereof or a pharmaceutically thereof acceptable salts or solvates can be used in the preparation of anti-tumor drugs. The invention designs and synthesizes a series of novel small molecule Chk1 inhibitors by using N-substituted pyridin-2-aminopyrimidine obtained by structure-based virtual screening as a lead compound, and carries out Chk1 kinase inhibitory activity test. The experiment confirmed that said compounds possess potent anticancer activity, Chk1 kinase inhibitory activity, and are promising Chk1 inhibitors, and can be used as new cancer therapeutic drugs, which can be applied to treat solid tumors or hematologic tumors related to proliferative disease of human or animal.

Abstract: Environmentally friendly, sustainable, and high-performance ultralight composite foams are disclosed. The composite foams are prepared from cellulose nanomaterial, polymeric material, and a crosslinking agent. The fabrication process is simple and uses only water. The composite foams exhibit an elastic strain exceeding the values reported for known nanocellulose-based foams with no reinforcement. The foams exhibit a thermal conductivity superior to that of traditional insulating materials and retain structural integrity after burning.

Abstract: Embodiments of the present disclosure provide a microelectronic assembly comprising: a first integrated circuit (IC) die in a first layer; an interposer in a second layer not coplanar with the first layer, the first layer coupled to the second layer by interconnects having a pitch of less than 10 micrometers between adjacent interconnects; and a first conductive pathway and a second conductive pathway in the interposer coupling the first IC die and a second IC die. The first IC die is configured to transmit at a first supply voltage through the first conductive pathway to a second IC die, the second IC die is configured to transmit to the first IC die through the second conductive pathway at a second supply voltage simultaneously with the first die transmitting at the first supply voltage, and the first supply voltage is different from the second supply voltage.

Abstract: A microelectronic device, a semiconductor package including the device, an IC device assembly including the package, and a method of making the device. The device includes a substrate; physical layer (PHY) circuitry on the substrate including a plurality of receive (RX) circuits and a plurality of transmit (TX) circuits; electrical contact structures at a bottom surface of the device; signal routing paths extending between the electrical contact structures on one hand, and, on another hand, at least some of the RX circuits or at least some of the TX circuits; and electrical pathways leading to the PHY circuitry and configured such that at least one of: an enable signal input to the device is to travel through at least some of the electrical pathways to enable a portion of the PHY circuitry; or a disable signal input to the device is to travel through at least some of the electrical pathways to disable a corresponding portion of the PHY circuitry.

Abstract: An ibuprofen controlled-release tablet and a method for preparing same are provided. The controlled-release tablet is composed of a drug-containing immediate-release layer and a drug-containing sustained-release layer, wherein a mass of ibuprofen in the drug-containing sustained-release layer is greater than a mass of ibuprofen in the drug-containing immediate-release layer, and a ratio of the mass of the ibuprofen in the drug-containing sustained-release layer to the mass of the ibuprofen in the drug-containing immediate-release layer is ?7. The tablet of the present disclosure has an effective analgesic effect for 24 h after administration.

Abstract: Embodiments of the present disclosure provide a microelectronic assembly comprising: a first integrated circuit (IC) die, the first IC die comprising an input/output (IO) circuit; and a plurality of IC dies, the plurality of IC dies comprising a second IC die, the second IC die comprising a microcontroller circuit to control the IO circuit, wherein the first IC die and the plurality of IC dies are coupled with interconnects having a pitch of less than 10 micrometers between adjacent ones of the interconnects.

Abstract: A microelectronic assembly is provided, comprising: a first integrated circuit (IC) die having a first connection to a first serializer/deserializer (SERDES) circuit and a second connection to a second SERDES circuit; a second IC die having the first SERDES circuit; and a third IC die having the second SERDES circuit, in which the first IC die is in a first layer, the second IC die and the third IC die are in a second layer not coplanar with the first layer, the first layer and the second layer are coupled by interconnects having a pitch of less than 10 micrometers between adjacent ones of the interconnects, and the first SERDES circuit and the second SERDES circuit are coupled by a conductive pathway.