Patents by Inventor Peirong Liu

Peirong Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12156418
    Abstract: A display substrate and a manufacturing method therefor, and a display device. The display substrate comprises: a substrate, the substrate comprising a blind hole area; a buffer layer covering one side of the substrate; an organic film layer provided on the surface of the buffer layer away from the substrate and having a first opening in the blind hole area; a passivation layer provided on the side of the organic film layer away from the substrate and having a second opening in the blind hole area; and a transparent electrode layer covering the passivation layer and the buffer layer in the second opening.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: November 26, 2024
    Assignees: Ordos Yuansheng Optoelectronics Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Hong Liu, Jingyi Xu, Yongqiang Zhang, Peng Liu, Peirong Huo, Wanzhi Chen, Xiaochun Xu, Jiantao Liu, Bo Li
  • Patent number: 12135849
    Abstract: Provided is a touch display substrate. The touch display substrate includes a base substrate, including a display region and a non-display region; a plurality of touch electrodes disposed in the display region; and a plurality of signal transmission circuits, a plurality of first control lines, a plurality of second control lines, a target signal line, and a plurality of touch signal lines that are disposed in the non-display region.
    Type: Grant
    Filed: August 4, 2021
    Date of Patent: November 5, 2024
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO. LTD., BOE TECHNOLOGY GROUP CO, LTD.
    Inventors: Peng Liu, Peirong Huo, Hong Liu, Chao Liang, Aiyu Ding, Zhenhong Xiao, Yongqiang Zhang, Yusheng Liu, Jingyi Xu, Jiantao Liu, Bo Li
  • Publication number: 20240353720
    Abstract: An array substrate and a display device are provided. The array substrate includes a display area and a non-display area that at least partially surrounds the display area; the non-display area includes at least two clock signal lines, wherein a ratio of a spacing between two adjacent clock signal lines to a line width of the clock signal lines is greater than or equal to 3.
    Type: Application
    Filed: March 31, 2022
    Publication date: October 24, 2024
    Inventors: Peirong HUO, Chao LIANG, Peng LIU, Jingyi XU, Bo LI, Zhenhong XIAO
  • Publication number: 20240295936
    Abstract: A display panel includes an active area; a fanout region; and a bonding region located on one side, away from the active area, of the fanout region. A driver chip is disposed in the bonding region. The driver chip includes a first side edge adjacent to the fanout region, a second side edge opposite to the first side edge, and two third side edges. The driver chip includes a plurality of output terminals disposed close to the first side edge. The display panel includes: a plurality of fanout lines located in the fanout region; and a plurality of gull-wing lines located in the bonding region. Part of the fanout lines extend from the fanout region to a region where the first side edge is located, and are electrically connected to the output terminals. Another part of the fanout lines are electrically connected to the output terminals via the gull-wing lines.
    Type: Application
    Filed: January 10, 2022
    Publication date: September 5, 2024
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Jingyi Xu, Jian Sun, Wei Yan, Zhenhong Xiao, Yadong Zhang, Zhen Wang, Peirong Huo, Hong Liu
  • Publication number: 20240255819
    Abstract: The present disclosure relates to a signal selector and a driving method therefor, a display panel, and a display device. The signal selector loads a writing signal into a control end of a switching circuit during a data writing time period, and the switching circuit is connected in response to the writing signal loaded on the control end of the switching circuit, so that the writing signal is loaded to a far end of an output signal line. During a pull up period after the data writing period, a boost control signal is loaded to the control end of a boost circuit, and the boost circuit pulls up the voltage of an output end of the switching circuit in response to the boost control signal loaded on a second end of the boost circuit.
    Type: Application
    Filed: June 29, 2022
    Publication date: August 1, 2024
    Inventors: Chao LIANG, Jingyi XU, Peirong HUO, Zhiming LI, Bo HUANG, Shuai HAN, Guodong WANG, Jiantao LIU, Biqi LI, Jianyun XIE
  • Patent number: 8887159
    Abstract: Systems and methods are provided for a flexible and scalable operating system achieving a fast boot. A computing system is described that includes a reserved static object memory configured to store predefined static threads, and a secure kernel configured to be executed in a fast boot mode. The secure kernel further may be configured to chain the static threads to a secure kernel thread queue stored in a secure kernel work memory, and to create temporary threads in the secure kernel work memory during the fast boot mode. The computing system may include a main kernel configured to be initialized by creating dynamic threads in a main kernel work memory during the fast boot mode. The main kernel may be configured to chain the static threads to a main kernel thread queue, and to assume control of the static threads from the secure kernel.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: November 11, 2014
    Assignee: Microsoft Corporation
    Inventors: Hironori Takahashi, Motoki Hirano, Peirong Liu, Yoichi Sato
  • Publication number: 20100083254
    Abstract: Systems and methods are provided for a flexible and scalable operating system achieving a fast boot. A computing system is described that includes a reserved static object memory configured to store predefined static threads, and a secure kernel configured to be executed in a fast boot mode. The secure kernel further may be configured to chain the static threads to a secure kernel thread queue stored in a secure kernel work memory, and to create temporary threads in the secure kernel work memory during the fast boot mode. The computing system may include a main kernel configured to be initialized by creating dynamic threads in a main kernel work memory during the fast boot mode. The main kernel may be configured to chain the static threads to a main kernel thread queue, and to assume control of the static threads from the secure kernel.
    Type: Application
    Filed: October 1, 2008
    Publication date: April 1, 2010
    Applicant: MICROSOFT CORPORATION
    Inventors: Hironori Takahashi, Motoki Hirano, Peirong Liu, Yoichi Sato
  • Patent number: 7149967
    Abstract: A table version of a document is generated by computing a table layout of the document and generating the table version based on the table layout. Computing the table layout can include recording the positions of each object in the document, dividing the document into sections, and grouping the sections based on their object content. Generating the table version of the document from the table layout can include creating table code that represents information in the table layout of the document. The table version of the document can be used to export the document to one or more computers in a distributed network while maintaining the visual fidelity and text content of the original document.
    Type: Grant
    Filed: March 27, 2003
    Date of Patent: December 12, 2006
    Assignee: Microsoft Corporation
    Inventors: Joshua Michael Pollock, Peirong Liu, Hannah Wei Zhou, David John Siedzik
  • Publication number: 20050210371
    Abstract: A table version of a document is generated by computing a table layout of the document and generating the table version based on the table layout. Computing the table layout can include recording the positions of each object in the document, dividing the document into sections, and grouping the sections based on their object content. Generating the table version of the document from the table layout can include creating table code that represents information in the table layout of the document. The table version of the document can be used to export the document to one or more computers in a distributed network while maintaining the visual fidelity and text content of the original document.
    Type: Application
    Filed: March 27, 2003
    Publication date: September 22, 2005
    Inventors: Joshua Pollock, Peirong Liu, Hannah Zhou, David Siedzik