Patents by Inventor Pei-Wei Lin
Pei-Wei Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240178102Abstract: A package includes a frontside redistribution layer (RDL) structure, a semiconductor die on the frontside RDL structure, and a backside RDL structure on the semiconductor die including a first RDL, and a backside connector extending from a distal side of the first RDL and including a tapered portion having a width that decreases in a direction away from the first RDL, wherein the tapered portion includes a contact surface at an end of the tapered portion. A method of forming the package may include forming the backside redistribution layer (RDL) structure, attaching a semiconductor die to the backside RDL structure, forming an encapsulation layer around the semiconductor die on the backside RDL structure, and forming a frontside RDL structure on the semiconductor die and the encapsulation layer.Type: ApplicationFiled: April 21, 2023Publication date: May 30, 2024Inventors: Chun-Ti LU, Hao-Yi TSAI, Chiahung LIU, Ken-Yu CHANG, Tzuan-Horng LIU, Chih-Hao CHANG, Bo-Jiun LIN, Shih-Wei CHEN, Pei-Rong NI, Hsin-Wei HUANG, Zheng GangTsai, Tai-You LIU, Steve SHIH, Yu-Ting HUANG, Steven SONG, Yu-Ching WANG, Tsung-Yuan YU, Hung-Yi KUO, CHung-Shi LIU, Tsung-Hsien CHIANG, Ming Hung TSENG, Yen-Liang LIN, Tzu-Sung HUANG, Chun-Chih CHUANG
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Patent number: 11996293Abstract: A semiconductor device includes a substrate, a first semiconductor fin and a second semiconductor fin protruding from the substrate, an isolation feature disposed on the substrate and on sidewalls of the first and second semiconductor fins, a gate structure disposed on the isolation feature. The semiconductor device also includes a dielectric fin disposed on the isolation feature and sandwiched between the first and second semiconductor fins. A middle portion of the dielectric fin separates the gate structure into a first gate structure segment engaging the first semiconductor fin and a second gate structure segment engaging the second semiconductor fin.Type: GrantFiled: August 2, 2021Date of Patent: May 28, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Pei-Yu Wang, Zhi-Chang Lin, Ching-Wei Tsai, Kuan-Lun Cheng
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Patent number: 11983848Abstract: Aspects of the disclosure provide a frame processor for processing frames with aliasing artifacts. For example, the frame processor can include a super-resolution (SR) and anti-aliasing (AA) engine and an attention reference frame generator coupled to the SR and AA engine. The SR and AA engine can be configured to enhance resolution and remove aliasing artifacts of a frame to generate a first high-resolution frame with aliasing artifacts and a second high-resolution frame with aliasing artifacts removed. The attention reference frame generator can be configured to generate an attention reference frame based on the first high-resolution frame and the second high-resolution frame.Type: GrantFiled: January 6, 2023Date of Patent: May 14, 2024Assignee: MEDIATEK INC.Inventors: Cheng-Lung Jen, Pei-Kuei Tsung, Chih-Wei Chen, Yao-Sheng Wang, Shih-Che Chen, Yu-Sheng Lin, Chih-Wen Goo, Shih-Chin Lin, Tsung-Shian Huang, Ying-Chieh Chen
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Patent number: 11978511Abstract: A phase-change memory (PCM) cell is provided to include a first electrode, a second electrode, and a phase-change feature disposed between the first electrode and the second electrode. The phase-change feature is configured to change its data state based on a write operation performed on the PCM cell. The write operation includes a reset stage and a set stage. In the reset stage, a plurality of reset current pulses are applied to the PCM cell, and the reset current pulses have increasing current amplitudes. In the set stage, a plurality of set current pulses are applied to the PCM cell, and the set current pulses exhibit an increasing trend in current amplitude. The current amplitudes of the set current pulses are smaller than those of the reset current pulses.Type: GrantFiled: January 21, 2022Date of Patent: May 7, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yung-Huei Lee, Chun-Wei Chang, Jian-Hong Lin, Wen-Hsien Kuo, Pei-Chun Liao, Chih-Hung Nien
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Publication number: 20240145319Abstract: A semiconductor device package includes a supporting element, a transparent plate disposed on the supporting element, a semiconductor device disposed under the transparent plate, and a lid surrounding the transparent plate. The supporting element and the transparent plate define a channel.Type: ApplicationFiled: January 2, 2024Publication date: May 2, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Tsung-Yu LIN, Pei-Yu WANG, Chung-Wei HSU
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Publication number: 20240144585Abstract: A computing device obtains an image depicting a face of a user. The computing device identifies facial features in the image and extracts characteristics of the facial features in the image. The computing device generates a two-dimensional (2D) face chart based on the facial feature characteristics. The computing device predicts a skin tone of the user's face depicted in the image of the user and changes color in a color map of a predefined three-dimensional (3D) model based on the predicted skin tone. The computing device selects a predefined environment map based on characteristics in the image depicting the face of the user and generates a target face image based on the predefined 3D model.Type: ApplicationFiled: October 26, 2023Publication date: May 2, 2024Inventors: I-Ting SHEN, Yi-Wei LIN, Pei-Wen HUANG
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Publication number: 20240103575Abstract: A foldable electronic device includes a first body, a second body, a pivot and a key module. The pivot is pivotally connected between the first body and the second body. The first body and the second body is configured to rotate relatively to each other through the pivot. The key module includes a bendable substrate and a sensor embedded in the bendable substrate. The bendable substrate is connected between the first body and the second body and covers an outer side of the pivot. The sensor generates a sensing signal in response to a press of a user upon the bendable substrate.Type: ApplicationFiled: November 21, 2022Publication date: March 28, 2024Applicant: ASUSTeK COMPUTER INC.Inventors: Te-Wei Huang, Pei-Chiang Lin, Sih-Ci Li
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Publication number: 20240096781Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.Type: ApplicationFiled: March 20, 2023Publication date: March 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Ti Lu, Hao-Yi Tsai, Chia-Hung Liu, Yu-Hsiang Hu, Hsiu-Jen Lin, Tzuan-Horng Liu, Chih-Hao Chang, Bo-Jiun Lin, Shih-Wei Chen, Hung-Chun Cho, Pei-Rong Ni, Hsin-Wei Huang, Zheng-Gang Tsai, Tai-You Liu, Po-Chang Shih, Yu-Ting Huang
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Patent number: 11922887Abstract: A display may include an array of pixels. Each pixel in the array includes an organic light-emitting diode coupled to associated thin-film transistors. The diode may be coupled to drive transistor circuitry, a data loading transistor, and emission transistors. The drive transistor circuitry may include at least two transistor portions connected in series. The data loading transistor has a drain region connected to a data line and a source region connected directly to the drive transistor circuitry. The data line may be connected to and overlap the drain region of the data loading transistor. The data line and the source region of the data loading transistor are non-overlapping to reduce row-to-row crosstalk.Type: GrantFiled: July 6, 2021Date of Patent: March 5, 2024Assignee: Apple Inc.Inventors: Shinya Ono, Chin-Wei Lin, Chuan-Jung Lin, Gihoon Choo, Hassan Edrees, Hei Kam, Jung Yen Huang, Pei-En Chang, Rungrot Kitsomboonloha, Szu-Hsien Lee, Zino Lee
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Publication number: 20240071767Abstract: A method includes removing a dummy gate stack to form a trench between gate spacers, depositing a gate dielectric extending into the trench, and performing a first treatment process on the gate dielectric. The first treatment process is performed using a fluorine-containing gas. A first drive-in process is then performed to drive fluorine in the fluorine-containing gas into the gate dielectric. The method further includes performing a second treatment process on the gate dielectric, wherein the second treatment process is performed using the fluorine-containing gas, and performing a second drive-in process to drive fluorine in the fluorine-containing gas into the gate dielectric. After the second drive-in process, conductive layers are formed to fill the trench.Type: ApplicationFiled: January 6, 2023Publication date: February 29, 2024Inventors: Hsueh-Ju Chen, Chi On Chui, Tsung-Da Lin, Pei Ying Lai, Chia-Wei Hsu
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Patent number: 8184055Abstract: An electromagnetic input LCD monitor is disclosed in this invention. The electromagnetic input LCD monitor includes a back frame and a film antenna module. The back frame has at least one opening. The film antenna module includes a film antenna plate and a signal receiving module. The film antenna plate is disposed on a surface of the back frame; the signal receiving module is disposed on the other surface of the back frame. The film antenna plate has a wiring portion which is connected with the signal receiving module through the opening.Type: GrantFiled: October 5, 2009Date of Patent: May 22, 2012Assignee: Waltop International CorporationInventors: Cheng-Lu Liu, Pei-Wei Lin, Sheng-Mao Lin
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Publication number: 20100238073Abstract: An electromagnetic input LCD monitor is disclosed in this invention. The electromagnetic input LCD monitor includes a back frame and a film antenna module. The back frame has at least one opening. The film antenna module includes a film antenna plate and a signal receiving module. The film antenna plate is disposed on a surface of the back frame; the signal receiving module is disposed on the other surface of the back frame. The film antenna plate has a wiring portion which is connected with the signal receiving module through the opening.Type: ApplicationFiled: October 5, 2009Publication date: September 23, 2010Applicant: WALTOP INTERNATIONAL CORPORATIONInventors: Cheng-Lu Liu, Pei-Wei Lin, Sheng-Mao Lin