Patents by Inventor Peiyuan Liu

Peiyuan Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8644098
    Abstract: Verification of the address connections of a memory (14) having multiplexed banks rows and columns commences by selecting a first address location having a bank/row/column value and then writing a pattern to a second location corresponding to the first location where one of the column, row, bank addresses could become stuck high or low. A second pattern gets written to the first location and a comparison occurs between the second pattern and first pattern written to the second location. If the data is the same, then that particular row/column/bank addresses is stuck.
    Type: Grant
    Filed: July 1, 2011
    Date of Patent: February 4, 2014
    Inventors: Peiyuan Liu, Henri Girard
  • Publication number: 20120250438
    Abstract: Verification of the address connections of a memory (14) having multiplexed banks rows and columns commences by selecting a first address location having a bank/row/column value and then writing a pattern to a second location corresponding to the first location where one of the column, row, bank addresses could become stuck high or low. A second pattern gets written to the first location and a comparison occurs between the second pattern and first pattern written to the second location. If the data is the same, then that particular row/column/bank addresses is stuck.
    Type: Application
    Filed: July 1, 2011
    Publication date: October 4, 2012
    Inventors: Peiyuan Liu, Henri Girard