Abstract: The present disclosure provides a memory block and its control method. The method includes: performing row-selection operation on at least a portion of at least one row of multiple rows of word lines in the memory block to select at least a portion of at least one row of memory cells; performing column-selection operation on at least one column of memory cells of at least one of multiple memory subarrays to select at least one memory cells to perform a memory operation.

Abstract: The techniques and circuits, described herein, include solutions for auto-zeroing in auto-zero amplifiers in the presence of high frequency alternating current (AC) noise. In some aspects, first and second inputs of an auto-zero amplifier are coupled to a differential voltage with high AC noise. During an auto-zero phase, a first switching network decouples the inputs of a first amplifier, comprised within the auto-zero amplifier, from the differential voltage with high AC noise. In some examples, the inputs of the first amplifier may be connected to a regulated direct current (DC) voltage. The regulated DC voltage provides a more accurate auto-zero for the auto-zero amplifier, such that higher overall accuracy is achieved during an operation phase.

Abstract: The invention relates to a method for connecting a connection piece to a U-shaped ring anchor for a head module for rail vehicles, the head module consisting predominantly of fiber-reinforced plastic material and having an outer shell and the ring anchor consisting of fiber-reinforced plastic material and being arranged in the roof region of the outer shell as a stiffening means. According to the method, connecting elements are fed through the dry or matrix-material-impregnated, unconsolidated fiber reinforcement structure of the ring anchor.

Abstract: Embodiments of this application provide an electronic device display method and an electronic device. The electronic device includes a foldable body, an outer screen, and an inner screen, and the method includes: when the foldable body is in a folded state, detecting whether a protective cover approaches the outer screen and reaches a preset position with respect to the outer screen; if the protective cover reaches the preset position with respect to the outer screen, when the preset condition is met, determining whether the foldable body is switched to a non-folded state; and if the foldable body is switched to the non-folded state, controlling the electronic device to be in a screen non-locked state. That the preset condition is met includes at least being within a preset time after the protective cover reaches the preset position.

Abstract: A platform for processing a workpiece includes a transmission mechanism, a plurality of workstations and a plurality of movable vehicles. The transmission mechanism transports the workpiece to be processed to one of the plurality of workstations. Each movable vehicle includes a processing module and a docking interface adapted to connect with a docking station of each workstation. The movable vehicles are each adapted to move in and out of each workstation, and each processing module is adapted to process the workpiece transmitted to the workstation after the movable vehicle is moved in and positioned in the workstation.

Abstract: A non-invasive time domain reflection probe calibration method includes: using different volume ratio of ethanol and deionized water mixed solution to calculate a test target's medium weight coefficient and waveguide length of the non-invasive time domain reflection probes; using different concentrations of NaCl solutions to calibrate a waveguide geometric dimensioning of the non-invasive time domain reflection probes; preparing compacted soil samples with known different moisture contents and densities, and calibrating a correlation parameter of compacted soil samples' dielectric constant and conductivity with moisture content and density. The method not only determines the sensitivity of the test target medium of the non-invasive time domain reflection probes, but also obtains the waveguide length and geometric dimensioning of the probe, and realizes an accurate test of moisture content and density of the soil.

Abstract: A controller obtains data stored in one or more data structures generated based on a defined task to be performed for a selected event. The data includes a set of constraints for the defined task. One or more task solutions generated for the defined task using the provided data are obtained. A determination is made as to whether the one or more task solutions include a task solution that satisfies one or more defined criteria. Based on determining that the one or more task solutions do not include the task solution that satisfies the one or more defined criteria, the set of constraints is automatically adjusted to provide an adjusted set of constraints. The adjusted set of constraints is to be automatically provided to a solution generator to be used to obtain the task solution that satisfies the one or more defined criteria.

Abstract: The present invention discloses a package structure for reducing warpage of plastic package wafer, including an adapter board, a chip mounted on the adapter board, and a first plastic package layer covering the chip, through-silicon-vias are disposed on the adapter board, the first and second surfaces of the adapter board are respectively provided with external connection solder balls and/or external connection solder pads electrically connected with the through-silicon-vias. The process of manufacturing the package structure includes: after the first surface process of the adapter board is completed, bonding the first carrier on its first surface, then cutting the first carrier to expose the chip-mounting area, and then carrying out subsequent processes such as chip mounting, and finally cutting and removing the first carrier to complete the package.

Abstract: The present disclosure provides a radiative cooling metal plate, a preparation method and application thereof. The radiative cooling metal plate includes a metal substrate, a first adhesive layer and a radiative cooling functional layer stacked in order, the radiative cooling functional layer is located on a surface of the metal substrate, the first adhesive layer is arranged between the metal substrate and the radiative cooling functional layer, and an elongation at break of the radiative cooling functional layer is in a range of 1% to 300%. The radiative cooling functional layer can have sufficient ductility, and can have sufficient deformation to cope with the bending of the radiative cooling functional layer during pressing, such that the radiative cooling functional layer will not be damaged or broken, thereby ensuring the structural integrity of the radiative cooling functional layer and great radiative cooling effect of the metal substrate.

Abstract: Disclosed in the present invention is a method for optimizing circuit timing based on a flexible register timing library.

Abstract: A deployable mesh antenna based on dome-type tensegrity includes: a wire mesh reflector, a dome-type reflector support system, and a peripheral deployable truss which are coaxially arranged; the peripheral deployable truss includes: a annular main rod and end-to-end truss units disposed on the main rod; an outermost cable boundary of the dome-type reflector support system is fixedly connected to the peripheral deployable truss, and the dome-type reflector support system includes: an inner strut ring, an outer circumference of the inner strut ring is connected to radial rib units, each radial rib unit is arranged at a radial direction of the inner strut ring, and the radial rib units are connected through hoop cables; the wire mesh reflector is covered on the dome-type reflector support system to form a parabolic structure, the wire mesh reflector is petal-shaped, and the wire mesh reflector has a grid structure.

Abstract: A deployable mesh antenna based on dome-type tensegrity includes: a wire mesh reflector, a dome-type reflector support system, and a peripheral deployable truss which are coaxially arranged; the peripheral deployable truss includes: a annular main rod and end-to-end truss units disposed on the main rod; an outermost cable boundary of the dome-type reflector support system is fixedly connected to the peripheral deployable truss, and the dome-type reflector support system includes: an inner strut ring, an outer circumference of the inner strut ring is connected to radial rib units, each radial rib unit is arranged at a radial direction of the inner strut ring, and the radial rib units are connected through hoop cables; the wire mesh reflector is covered on the dome-type reflector support system to form a parabolic structure, the wire mesh reflector is petal-shaped, and the wire mesh reflector has a grid structure.

Abstract: Disclosed in the present invention is a flexible modeling method for a timing constraint of a register. Simulation ranges of input terminal transition time, clock terminal transition time, and output load capacitance of a register are determined first, simulation is performed under each combination of input terminal transition time, clock terminal transition time, and output load capacitance to obtain a timing constraint range, then setup slack and hold slack are extracted in this constraint range with a particular interval, and then simulation is performed to obtain a clock terminal-to-output terminal delay. Finally, a mutually independent timing model of the register is established by using an artificial neural network, where the clock terminal-to-output terminal delay is modeled as a function of the input terminal transition time, the clock terminal transition time, the output load capacitance, the setup slack, the hold slack, and an output terminal state.

Abstract: A pixel array, a display apparatus and a fine metal mask are provided. The pixel array includes first basic pixel units in odd-numbered rows and second basic pixel units in even-numbered rows; each first basic pixel unit includes first, second and third sub-pixel groups sequentially in a row direction; each second basic pixel unit includes the third, first and second sub-pixel groups sequentially in the row direction; the first, second and third sub-pixel groups include two first, two second and two third sub-pixels in a column direction, respectively; the first, second and third sub-pixels have different colors; the first and second basic pixel units in the even-numbered and odd-numbered rows are aligned in the column direction, respectively; in the first and second basic pixel units in two adjacent rows, the third sub-pixel groups in the two rows are staggered with each other in the row direction.

Abstract: Disclosed in the present invention is a method for predicting a delay at multiple corners for a digital integrated circuit, which is applicable to the problem of timing signoff at multiple corners. In the aspect of feature engineering, a path delay relationship at adjacent corners is extracted by using a dilated convolutional neural network (Dilated CNN), and learning is performed by using a bi-directional long short-term memory model (Bi-directional Long Short-Term Memory, BLSTM) to obtain topology information of a path. Finally, prediction results of a path delay at a plurality of corners are obtained by using an output of a multi-gate mixture-of-experts network model (Multi-gate Mixture-of-Experts, MMoE).

Abstract: An air conditioning system, including a compressor, two outdoor heat exchange units, a liquid pipe used for communicating with indoor units, a high-pressure gas tube and a low-pressure gas tube; the air conditioning system further includes a valve assembly. One outdoor heat exchange unit has a first state in which one end thereof communicates with the high-pressure gas tube and another end thereof communicates with the liquid pipe, and has a second state in which one end thereof communicates with the low-pressure gas tube and the other end thereof communicates with the liquid pipe. Further disclosed is a control method for the air conditioning system.

Abstract: Disclosed in the present invention is a method for optimizing circuit timing based on a flexible register timing library.