Abstract: A phase interpolation device and a multi-phase clock generation device are provided. The phase interpolation device includes a digital controller circuit and a phase interpolator that includes a capacitor and circuit branches, which are controlled by the digital controller circuit to generate an n-th phase clock of N phase clocks between first and second input clocks. When the n-th phase clock is generated, the digital controller circuit controls, in response to appearances of rising edges of the first input clock, the circuit branches to charge the capacitor using (N?n+1)×M ones of the first current source, and controls, in response to appearances of rising edges of the second input clock, the circuit branches to use N×M ones of the first current source to charge the capacitor. N, M, n are integers.

Abstract: A slew rate control device and a slew rate control method are provided. The slew rate control device includes a signal generating circuit, a comparator circuit, and a control circuit. The signal generating circuit generates a first voltage signal and a second voltage signal having a slew rate, and the first voltage signal and the second voltage signal are a pair of differential signals. The comparator circuit outputs an enabling signal according to a relative positional relationship between an eye crossing point of the pair of differential signals and a signal edge of a reference clock. The control circuit generates at least one control signal according to the enabling signal to control the signal generating circuit, such that the signal generating circuit changes the slew rate of the first voltage signal and the second voltage signal according to the at least one control signal.

Abstract: The present invention discloses a receive data equalization apparatus. A delay-compensating calculation circuit retrieves training data groups of a training data signal to retrieve total delay amount, generate signed compensation amounts according to a relation among training data contents of training data in each of the training data groups to generate total compensation amount accordingly, and solve equations that correspond total delay amount of the training data groups to the total compensation amount to obtain each of the compensation amounts. A receive data equalization circuit receives the compensation amounts and retrieves a receive data group in a receive data signal, generate signed receive compensation amounts according to a relation among receive data contents of receive data in the receive data group to generate a total receive compensation amount accordingly to perform equalization on a terminal edge of the receive data group according to the total receive compensation amount.

Abstract: A phase interpolation device and a multi-phase clock generation device are provided. The phase interpolation device includes a digital controller circuit and a phase interpolator that includes a capacitor and circuit branches, which are controlled by the digital controller circuit to generate an n-th phase clock of N phase clocks between first and second input clocks. When the n-th phase clock is generated, the digital controller circuit controls, in response to appearances of rising edges of the first input clock, the circuit branches to charge the capacitor using (N?n+1)×M ones of the first current source, and controls, in response to appearances of rising edges of the second input clock, the circuit branches to use N×M ones of the first current source to charge the capacitor. N, M, n are integers.

Abstract: A slew rate control device and a slew rate control method are provided. The slew rate control device includes a signal generating circuit, a comparator circuit, and a control circuit. The signal generating circuit generates a first voltage signal and a second voltage signal having a slew rate, and the first voltage signal and the second voltage signal are a pair of differential signals. The comparator circuit outputs an enabling signal according to a relative positional relationship between an eye crossing point of the pair of differential signals and a signal edge of a reference clock. The control circuit generates at least one control signal according to the enabling signal to control the signal generating circuit, such that the signal generating circuit changes the slew rate of the first voltage signal and the second voltage signal according to the at least one control signal.

Abstract: The present invention discloses a receive data equalization apparatus. A delay-compensating calculation circuit retrieves training data groups of a training data signal to retrieve total delay amount, generate signed compensation amounts according to a relation among training data contents of training data in each of the training data groups to generate total compensation amount accordingly, and solve equations that correspond total delay amount of the training data groups to the total compensation amount to obtain each of the compensation amounts. A receive data equalization circuit receives the compensation amounts and retrieves a receive data group in a receive data signal, generate signed receive compensation amounts according to a relation among receive data contents of receive data in the receive data group to generate a total receive compensation amount accordingly to perform equalization on a terminal edge of the receive data group according to the total receive compensation amount.

Abstract: A micro-connector with flatly disposed pins is provided, including a plug unit and a metal shell. The plug unit includes an insulation element, a plug, and a plurality of pins, wherein the plug and a plurality of pins are disposed on opposite sides of the insulation element. The metal ends of the pins penetrate through the inside of the insulation element to extend into the plug for electrical connection. The metal shell is engaged to the insulation element, with extending positioning pins. The insertion direction of the positioning pins forms an angle with the insertion direction of the plug. The angle is preferably between 45°-135° so as to enable easy assembly and good fastening result.

Abstract: An apparatus of storage medium for interface both USB host and USB OTG device is provided, including a USB module, a micro USB module, a control module, a storage module, where the control module is connected to the USB module, the micro USB module and the storage module, and provides signals to determine and control the data flow among the above modules. The apparatus can be connected to a USB host via the USB module and/or a USB OTG device via the micro USB module to access data in the storage module. The storage module can be realized as, for example, a pendrive module, a memory card reader with memory card, or a pendrive module plus a memory card reader with memory card. When connected to both a USB host and a USB OTG device simultaneously, the apparatus of the present invention can function as a USB cable.

Abstract: A phase-locked loop (PLL) with novel phase detection mechanism is provided, including a phase frequency detector (PFD), a controller, a digital-to-analog (D2A) module, and a voltage-controlled oscillator/current-controlled oscillator (VCO/ICO), wherein PFD has a reference signal input and an input from the output signal of the VCO/ICO and is connected to the controller, the controller is then further connected to the D2A module, the D2A module converts the control signal from the controller into an analog voltage to control the frequency and phase of VCO/ICO. It is worth noting that the PFD of the present invention has a novel phase detection mechanism so that the phase detection can be accomplished by observing signal level transitions of the reference signal input and a delayed reference signal with respect to the output signal of the VCO/ICO without edge alignment. In addition, the novel phase detection mechanism also allows flexible reference signal input.

Abstract: A phase-locked loop (PLL) with novel phase detection mechanism is provided, including a phase frequency detector (PFD), a controller, a digital-to-analog (D2A) module, and a voltage-controlled oscillator/current-controlled oscillator (VCO/ICO), wherein PFD has a reference signal input and an input from output signal of the VCO/ICO and is connected to the controller, the controller is then further connected to D2A module, D2A module converts the control signal from the controller into an analog voltage to control the frequency and phase of VCO/ICO. It is worth noting that the PFD of the present invention has a novel phase detection mechanism so that the phase detection does not rely on edge alignment. In addition, the novel phase detection mechanism also allows flexible reference signal input, as opposed to the aforementioned fixed external source, such as, a crystal.

Abstract: An apparatus for generating multi-phase clock signals with a ring oscillator is provided, including a first stage phase-blender module and a second stage phase-blender module. The first stage phase-blender module further includes a plurality of differential OP phase-blender circuits. Each differential blender circuit has two signal inputs, and an output signal whose phase is an interpolation of the two input signals. The second stage phase blender module includes a plurality of inverter phase-blender circuits. Each inverter phase-blender circuit receives two output signals from the first stage phase-blender module as inputs, and outputs a clock signal with the interpolated phase of the two output signals of the first stage phase-blender module.

Abstract: An apparatus and method for automatically switching between USB host and device is provided. In a device with a USB interface, the present invention automatically switches between a USB host and USB device by detecting the handshake protocol of the D+ and D? pins of the USB interface. The apparatus for automatically switching between USB host and device includes ah host mode element, a device mode element, a random auto-switcher, and a detection element. The random auto-switcher switches the connection to the host mode element or the device mode element at random time. The detection element monitors the handshake protocol of the D+ and D? pins of USB interface and the external USB-interface device to determine whether the host mode or the device mode is in use. When the present invention detects the external USB-interfaced device is a host, the present invention switches to become a USB device.

Abstract: An apparatus for automatically detecting and differentiating between a USB host and a USB device is provided. In a device with a USB interface, the present invention is coupled with the VBUS pin of the USB interface of the device. By monitoring the voltage change on the VBUS pin, the present invention determines whether the external device connected through the USB interface is a USB host or a USB device. The apparatus for automatically detecting and differentiating between a USB host and a USB device of the present invention includes a voltage detection circuit and a voltage detector. The voltage detection circuit is coupled with the voltage detector and the VBUS pin of the USB interface. The voltage detection circuit can be a voltage splitter. The voltage of voltage detection circuit can be changed according to the voltage signal inputted externally from the VBUS pin of the USB interface.

Abstract: An apparatus and method for automatically switching between USB host and device is provided. In a device with a USB interface, the present invention automatically switches between a USB host and USB device by detecting the handshake protocol of the D+ and D? pins of the USB interface. The apparatus for automatically switching between USB host and device includes ah host mode element, a device mode element, a random auto-switcher, and a detection element. The random auto-switcher switches the connection to the host mode element or the device mode element at random time. The detection element monitors the handshake protocol of the D+ and D? pins of USB interface and the external USB-interface device to determine whether the host mode or the device mode is in use. When the present invention detects the external USB-interfaced device is a host, the present invention switches to become a USB device.

Abstract: An apparatus for generating multi-phase clock signals with a ring oscillator is provided, including a first stage phase-blender module and a second stage phase-blender module. The first stage phase-blender module further includes a plurality of differential OP phase-blender circuits. Each differential blender circuit has two signal inputs, and an output signal whose phase is an interpolation of the two input signal. The second stage phase blender module includes a plurality of inverter phase-blender circuits. Each inverter phase-blender circuit receives two output signals from the first stage phase-blender module as inputs, and outputs a clock signal with the interpolated phase of the two output signals of the first stage phase-blender module.

Abstract: The present invention provides a SATA cable with light display feature, which is mainly used for the SATA cables for computer host and their peripheral devices. With the light display capability, the connection readiness status and the signal transmission conditions can be easily detected via the pins on the SATA cable. The realization technique used by the present invention is adding the LED lights and the control pins inlayed at the two plug-in ends of the SATA cable. When the two plug-in ends of the SATA cable are both connected and ready, or there is data transmission going on, the control pins automatically turn on the LED lights to indicate the ON/ACTIVE connection status/condition.

Abstract: A USB portable storage device with multi-port plugs is provided, including a flash memory, a USB controller, a USB physical layer, and a plurality of USB connector. The USB controller is connected to the flash memory for controlling the access to the flash memory. The USB physical layer provides the interface between the USB controller and the USB connectors, and is connected to a plurality of USB connectors to form data communication channels with all these USB connectors.

Abstract: An improved SATA interface is provided by integrating a power line into a standard ATA interface. One end of the power line is connected to the power pin of the PC and the other end is connected to the power pin of the device, so that the device can draw power from the PC. This saves the power supply design in the external devices, simplifies the device wiring and reduces the manufacture cost.

Abstract: A storage device with a SATA interface is provided. The storage device uses a SATA to interface with PC and notebook/laptop computers. The storage device includes a SATA connector, a SATA interface and a memory module. The memory module further includes memory chips, and a memory controller. The memory controller further includes a microprocessor controller, a set of operational registers, and a memory interface. The microprocessor controller further includes a display element for displaying the status of the storage device. With the SATA interface, the portable storage device can achieve higher transmission speed and better transmission quality than conventional portable storage devices using USB interface.