Patents by Inventor Peng Ong
Peng Ong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20200268565Abstract: A disposable absorbent article such as a diaper, pant diaper, a sanitary pant or incontinence garment, intended to be worn around the waist of a wearer is provided. The absorbent article has a chassis having a front portion, a back portion and a crotch portion therebetween. The absorbent article optionally has one or more fastening tabs attached to the back or front portion of the chassis. The absorbent article has an absorbent core secured to the chassis in at least the crotch portion. The absorbent article is provided with a QR-code on a garment facing-side thereof and on a carrier material in or on at least one of the front portion, back portion and/or on the one or more fastening tabs. The carrier material has a Gurley stiffness of 8 mgf or more.Type: ApplicationFiled: September 7, 2017Publication date: August 27, 2020Applicant: Essity Hygiene and Health AktiebolagInventors: Wen Shiuan Ling, Chow Peng Ong, Huey Chyi U
-
Patent number: 10302694Abstract: One example includes a test system that includes a printed circuit board and a switching interposer board. The switching interposer board is comprised of a probe point, a first bus, a second bus, and a set of switches. Each switch includes a first terminal, a second terminal, and a third terminal, the first terminal being coupled to a respective pin of an integrated circuit device, the second terminal being coupled to the first bus, and the third terminal being coupled to the second bus. Each of the set of switches have a first state that selectively couples a pair of the pins of the integrated circuit device to each other through the first bus during a short test, and a second state that selectively couples at least one of the pins of the integrated circuit device to the probe point through the second bus during a voltage level spike test.Type: GrantFiled: December 27, 2016Date of Patent: May 28, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Chee Peng Ong, Hoon Siong Chia
-
Publication number: 20180180668Abstract: One example includes a test system that includes a printed circuit board and a switching interposer board. The switching interposer board is comprised of a probe point, a first bus, a second bus, and a set of switches. Each switch includes a first terminal, a second terminal, and a third terminal, the first terminal being coupled to a respective pin of an integrated circuit device, the second terminal being coupled to the first bus, and the third terminal being coupled to the second bus. Each of the set of switches have a first state that selectively couples a pair of the pins of the integrated circuit device to each other through the first bus during a short test, and a second state that selectively couples at least one of the pins of the integrated circuit device to the probe point through the second bus during a voltage level spike test.Type: ApplicationFiled: December 27, 2016Publication date: June 28, 2018Inventors: CHEE PENG ONG, HOON SIONG CHIA
-
Patent number: 9207278Abstract: An electronic package that has an array of pins may be tested for shorts and continuity in a parallel manner. The array of pins are allocated to four or more groups of pins such that each pin in each group is not adjacent to a pin from its own group of pins. One of the groups of pins is tested for continuity while placing a reference voltage level on all of the pins in the other groups of pins. A separate current source is coupled to each pin and a resultant voltage is measured. A short between one of the pins in the first group and a pin in one of the other groups can be detected when the resultant voltage on one of the pins in the first group is approximately equal to the reference voltage. Group-wise testing is repeated until all groups have been tested.Type: GrantFiled: March 22, 2013Date of Patent: December 8, 2015Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Hoon Siong Chia, Chee Peng Ong
-
Patent number: 9140751Abstract: An electronic package having multiple pins may be tested in parallel for output short circuit current by simulating a direct short to ground by simultaneously connecting multiple output pins directly to ground in order to active a current limiter associated with each of the output pins. The pins are then connected to a resistive connection to ground via a set of resistors; the direct ground is then removed, such that the current limiter associated with each of the output pins remains activated. A voltage drop across each of the set of resistors is measured simultaneously. An output short circuit current fault is indicated when the voltage drop across any of the resistors exceeds a threshold value corresponding to a maximum output short circuit current value.Type: GrantFiled: March 27, 2013Date of Patent: September 22, 2015Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Chee Peng Ong, Wen Hui Woon, Benyong Zhang, Eric Lindgren
-
Publication number: 20140292361Abstract: An electronic package having multiple pins may be tested in parallel for output short circuit current by simulating a direct short to ground by simultaneously connecting multiple output pins directly to ground in order to active a current limiter associated with each of the output pins. The pins are then connected to a resistive connection to ground via a set of resistors; the direct ground is then removed, such that the current limiter associated with each of the output pins remains activated. A voltage drop across each of the set of resistors is measured simultaneously.Type: ApplicationFiled: March 27, 2013Publication date: October 2, 2014Applicant: Texas Instruments IncorporatedInventors: Chee Peng Ong, Wen Hui Woon, Benyong Zhang, Eric Lindgren
-
Publication number: 20140285229Abstract: An electronic package that has an array of pins may be tested for shorts and continuity in a parallel manner. The array of pins are allocated to four or more groups of pins such that each pin in each group is not adjacent to a pin from its own group of pins. One of the groups of pins is tested for continuity while placing a reference voltage level on all of the pins in the other groups of pins. A separate current source is coupled to each pin and a resultant voltage is measured. A short between one of the pins in the first group and a pin in one of the other groups can be detected when the resultant voltage on one of the pins in the first group is approximately equal to the reference voltage. Group-wise testing is repeated until all groups have been tested.Type: ApplicationFiled: March 22, 2013Publication date: September 25, 2014Applicant: Texas Instruments IncorporatedInventors: Hoon Siong Chia, Chee Peng Ong
-
Patent number: 8276104Abstract: A process for automated via doubling in a layout of a semiconductor device, comprising: selecting at least one cell of the layout for via doubling, wherein the at least one cell comprises at least two metal layers; selecting at least two metal layers of the at least one cell for via doubling; selecting metal/metal intersection areas out of the at least two metal layers, wherein a metal/metal intersection comprises an existing via interconnecting a plurality of metal layers; and dimensionally fitting additional vias into the selected metal/metal intersection areas, wherein the additional vias are placed into the layout.Type: GrantFiled: December 9, 2010Date of Patent: September 25, 2012Assignee: Spansion LLCInventors: Gregory Sylvester Emmanuel, Hui-Peng Ong, Kian-Boon How, Joseph Lin
-
Publication number: 20120151430Abstract: A process for automated via doubling in a layout of a semiconductor device, comprising: selecting at least one cell of the layout for via doubling, wherein the at least one cell comprises at least two metal layers; selecting at least two metal layers of the at least one cell for via doubling; selecting metal/metal intersection areas out of the at least two metal layers, wherein a metal/metal intersection comprises an existing via interconnecting a plurality of metal layers; and dimensionally fitting additional vias into the selected metal/metal intersection areas, wherein the additional vias are placed into the layout.Type: ApplicationFiled: December 9, 2010Publication date: June 14, 2012Inventors: Gregory Sylvester EMMANUEL, Hui-Peng ONG, Kian-Boon HOW, Joseph LIN
-
Patent number: 7915907Abstract: A system is provided that facilitates locating long dangling metal routes in a semiconductor chip design. The system includes mechanisms for partitioning metal features of the chip design to discover dangling metal routes that could be potential violations. The system further comprises mechanisms for determining if the dangling metal routes of the chip design exceed a length limit that could result antenna violations, undesired noise in the circuit, circuitry breakdown or the like. The system enables excessively long dangling metal routes to be allowed as exceptional cases. Machine learning is provided to receive feedback to refine the exceptional cases and enable more efficient fault detection.Type: GrantFiled: June 25, 2007Date of Patent: March 29, 2011Assignee: Spansion LLCInventors: Hui Peng Ong, Chun Keong Lee, Gregory Sylvester Emmanuel
-
Publication number: 20080315906Abstract: A system is provided that facilitates locating long dangling metal routes in a semiconductor chip design. The system includes mechanisms for partitioning metal features of the chip design to discover dangling metal routes that could be potential violations. The system further comprises mechanisms for determining if the dangling metal routes of the chip design exceed a length limit that could result antenna violations, undesired noise in the circuit, circuitry breakdown or the like. The system enables excessively long dangling metal routes to be allowed as exceptional cases. Machine learning is provided to receive feedback to refine the exceptional cases and enable more efficient fault detection.Type: ApplicationFiled: June 25, 2007Publication date: December 25, 2008Applicant: SPANSION LLCInventors: Hui-Peng Ong, Chun-Keong Lee, Gregory Sylvester Emmanuel
-
Publication number: 20070208950Abstract: A method and apparatus for automatic user authentication are described. The method includes receiving information at a device, the device including a credential container; storing the information at the credential container and performing cryptographic calculations on the received information and providing the encrypted information upon request.Type: ApplicationFiled: February 20, 2007Publication date: September 6, 2007Inventor: Peng Ong
-
Publication number: 20070050362Abstract: A method and system for protecting electronic files by applying a portable access control lock to each electronic file while allowing multi-user access to the protected electronic files across a distributed network is described. The portable access control lock is adapted for implementing a set of complex access control rules that include managing an audit trail for the corresponding protected electronic file.Type: ApplicationFiled: October 21, 2005Publication date: March 1, 2007Inventors: Chee Low, Peng Ong
-
Publication number: 20060083228Abstract: The invention relates to a system for securing access to resources or computer systems by means of a self modifying, single use password that limits access to a system and automatically changes each time it is used. Independent computer systems, or clients, are utilized by users to generate one time passcodes to prove their identity to one or more authentication servers. Servers are used to authenticate user inputted one time passcodes, to maintain and update the status of one time passcode clients, and perform rekeying and reset operations. Middleware, an optional component, allows for the interaction between one time passcode clients and servers. Middleware allows for client rekeying and resets as well as synchronisation between the client and server.Type: ApplicationFiled: October 20, 2004Publication date: April 20, 2006Inventors: Peng Ong, Sriram Ramachandran
-
Publication number: 20060080729Abstract: A method and system for strengthening authentication credentials for accessing any number of applications across multiple access interfaces and across multiple remote access sites is disclosed. The applications can be accessed by a set of authorized users by using multiple instances of a predictive scheme for generating and synchronizing the authentication credentials and by leveraging pre-existing infrastructure associated with the applications.Type: ApplicationFiled: May 18, 2005Publication date: April 13, 2006Applicant: Encentuate Pte. Ltd.Inventors: Eng-Kiat Koh, Mok Ku, Chee Low, Peng Ong
-
Publication number: 20050210247Abstract: A method of authentication that provides the security of a challenge response authentication is described. The method is compatible with an existing infrastructure password-based authentication.Type: ApplicationFiled: March 18, 2004Publication date: September 22, 2005Inventors: Peng Ong, Eng-Kiat Koh
-
Publication number: 20050182971Abstract: A multi-purpose user authentication card that combines the functions of one-time passcode generator, storage components and smart card components in a single compact device. A microprocessor generates the one-time passcode, which is displayed on a screen for 30-60 seconds. A smart card performs basic encryption and decryption to allow the user to gain access to a protected external resource. An independent, rechargeable power source allows the card to switch between an active mode, a standby mode and an off mode.Type: ApplicationFiled: February 12, 2004Publication date: August 18, 2005Inventors: Peng Ong, Chua Joo, Chin Vui
-
Publication number: 20040156617Abstract: A video recorder has a source of a digital stream representing a video signal and a medium interface for recording the digital stream as a recording among a plurality of recordings. An indicator of the video signal standard is also recorded for each recording. When a change in the video standard is detected, a new recording is started with an indicator of the new video standard attached.Type: ApplicationFiled: February 3, 2004Publication date: August 12, 2004Inventors: Kwong Heng Kwok, Chuan Peng Ong