Abstract: A layered modeling method for laser metal deposition (LIVID) 3D printing. The layered modeling method includes: obtaining estimated printing parameters of each layer in an entire digital model based on a process database; obtaining estimated feature points of each layer through the estimated parameters; comparing estimated feature points of each layer with feature points of a corresponding actual shape to obtain a difference in each layer; and accumulating to obtain a difference in the entire digital model to obtain corresponding printing parameters. The layered modeling method has the advantages of effectively reducing the calculation amount during data comparison and greatly saving time.

Abstract: A method for deliver relevant responses to ambiguous queries includes receiving, from a user device associated with a user, a query requesting either information from a digital assistant service or performance of an action by the digital assistant service. When a user intent of the query is unresolved, the method also includes retrieving, from a search engine, currently trending search results for the query and resolving the user intent of the query based on the search results. The method also includes generating a response to the query based the resolved user intent. The response includes information obtained from a particular intent vertical associated with the resolved user intent or fulfillment of the action by the digital assistant service.

Abstract: A layered modeling method for laser metal deposition (LMD) 3D printing. The layered modeling method includes: obtaining estimated printing parameters of each layer in an entire digital model based on a process database; obtaining estimated feature points of each layer through the estimated parameters; comparing estimated feature points of each layer with feature points of a corresponding actual shape to obtain a difference in each layer; and accumulating to obtain a difference in the entire digital model to obtain corresponding printing parameters. The layered modeling method has the advantages of effectively reducing the calculation amount during data comparison and greatly saving time.

Abstract: A method for manufacturing a board-to-board connecting structure, including providing a first circuit board, including a first dielectric layer, a second dielectric layer stacked on the first dielectric layer, and a first wiring layer sandwiched between the first dielectric layer and the second dielectric layer. A second circuit board is provided, including a third dielectric layer, a fourth dielectric layers stacked on the third dielectric layer, and a second wiring layer sandwiched between the third dielectric layer and the fourth dielectric layer. The first step and the fourth dielectric layer are bonded through a first adhesive layer. The third step and the dielectric layer are bonded through a second adhesive layer. The second step and the fourth step are bonded through the conductive layer.

Abstract: A method for manufacturing a board-to-board connecting structure, including providing a first circuit board, including a first dielectric layer, a second dielectric layer stacked on the first dielectric layer, and a first wiring layer sandwiched between the first dielectric layer and the second dielectric layer. A second circuit board is provided, including a third dielectric layer, a fourth dielectric layers stacked on the third dielectric layer, and a second wiring layer sandwiched between the third dielectric layer and the fourth dielectric layer. The first step and the fourth dielectric layer are bonded through a first adhesive layer. The third step and the dielectric layer are bonded through a second adhesive layer. The second step and the fourth step are bonded through the conductive layer.

Abstract: A fast active DCAP cell which has a short turn-on time, achieves a high capacitance density, and which minimizes leakage overhead during its normal operation mode is disclosed. The DCAP cell has a pair of PMOS transistors that have their drains connected to a gate of a PMOS transistor and their sources connected to the VDD rail. The drain and source of the PMOS transistor are connected to the VSS rail. Likewise, the DCAP cell has a pair of NMOS transistors that have their drains connected to a gate of an PMOS transistor and their sources connected to the VSS rail. The drain and source of the PMOS transistor are connected to the VDD rail. None of the gates of the transistors is connected to the VDD or VSS rail. This protects the gate oxide from being damaged by ESD surge currents.

Abstract: A fast active DCAP cell which has a short turn-on time, achieves a high capacitance density, and which minimizes leakage overhead during its normal operation mode is disclosed. The DCAP cell has a pair of PMOS transistors that have their drains connected to a gate of a PMOS transistor and their sources connected to the VDD rail. The drain and source of the PMOS transistor are connected to the VSS rail. Likewise, the DCAP cell has a pair of NMOS transistors that have their drains connected to a gate of an PMOS transistor and their sources connected to the VSS rail. The drain and source of the PMOS transistor are connected to the VDD rail. None of the gates of the transistors is connected to the VDD or VSS rail. This protects the gate oxide from being damaged by ESD surge currents.