Patents by Inventor Peng Wu

Peng Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • PRINTED CIRCUIT BOARD WITH HIGH-CAPACITY COPPER CIRCUIT
    Publication number: 20180139842
    Abstract: A printed circuit board with high-capacity and high-current copper circuit includes a conductive trace, a first protecting layer, and a second protecting layer on opposite sides of the conductive trace. The conductive trace includes a basic conductive trace pattern, a first conductive trace pattern, and a second conductive trace pattern. The first and second conductive trace patterns are directly formed on opposite surfaces of the basic copper conductive trace pattern. A width of trace of the first conductive trace pattern is the same as a line width of the second conductive trace pattern.
    Type: Application
    Filed: January 13, 2018
    Publication date: May 17, 2018
    Inventors: FANG-BO XU, PENG WU, JIAN-QUAN SHEN, KE-JIAN WU
  • Multi-petascale highly efficient parallel supercomputer
    Patent number: 9971713
    Abstract: A Multi-Petascale Highly Efficient Parallel Supercomputer of 100 petaflop-scale includes node architectures based upon System-On-a-Chip technology, where each processing node comprises a single Application Specific Integrated Circuit (ASIC). The ASIC nodes are interconnected by a five dimensional torus network that optimally maximize the throughput of packet communications between nodes and minimize latency. The network implements collective network and a global asynchronous network that provides global barrier and notification functions. Integrated in the node design include a list-based prefetcher. The memory system implements transaction memory, thread level speculation, and multiversioning cache that improves soft error rate at the same time and supports DMA functionality allowing for parallel processing message-passing.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: May 15, 2018
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Sameh Asaad, Ralph E. Bellofatto, Michael A. Blocksome, Matthias A. Blumrich, Peter Boyle, Jose R. Brunheroto, Dong Chen, Chen-Yong Cher, George L. Chiu, Norman Christ, Paul W. Coteus, Kristan D. Davis, Gabor J. Dozsa, Alexandre E. Eichenberger, Noel A. Eisley, Matthew R. Ellavsky, Kahn C. Evans, Bruce M. Fleischer, Thomas W. Fox, Alan Gara, Mark E. Giampapa, Thomas M. Gooding, Michael K. Gschwind, John A. Gunnels, Shawn A. Hall, Rudolf A. Haring, Philip Heidelberger, Todd A. Inglett, Brant L. Knudson, Gerard V. Kopcsay, Sameer Kumar, Amith R. Mamidala, James A. Marcella, Mark G. Megerian, Douglas R. Miller, Samuel J. Miller, Adam J. Muff, Michael B. Mundy, John K. O'Brien, Kathryn M. O'Brien, Martin Ohmacht, Jeffrey J. Parker, Ruth J. Poole, Joseph D. Ratterman, Valentina Salapura, David L. Satterfield, Robert M. Senger, Burkhard Steinmacher-Burow, William M. Stockdell, Craig B. Stunkel, Krishnan Sugavanam, Yutaka Sugawara, Todd E. Takken, Barry M. Trager, James L. Van Oosten, Charles D. Wait, Robert E. Walkup, Alfred T. Watson, Robert W. Wisniewski, Peng Wu
  • Unification of descriptive programming and object repository
    Patent number: 9959196
    Abstract: A computer device may include logic configured to provide a centralized library for descriptive programming and other types of object descriptions to a testing script engine. The descriptive programming library may store test object descriptions for test objects associated with an application under testing. The logic may be further configured to provide a unification layer over all the object description types and to provide inheritance among the objects at the unification layer. The logic may be further configured to store a test object description, associated with a test object, in the descriptive programming library; identify a reference to the test object in a descriptive programming statement associated with the testing script engine; access the stored test object description in the descriptive programming library based on the identified reference to the test object; and identify an application object, associated with the application under testing, based on the stored test object description.
    Type: Grant
    Filed: July 16, 2014
    Date of Patent: May 1, 2018
    Assignee: Verizon Patent and Licensing Inc.
    Inventor: Peng Wu
  • Optimize control-flow convergence on SIMD engine using divergence depth
    Patent number: 9952876
    Abstract: There are provided a system, a method and a computer program product for selecting an active data stream (a lane) while running SPMD (Single Program Multiple Data) code on SIMD (Single Instruction Multiple Data) machine. The machine runs an instruction stream over input data streams. The machine increments lane depth counters of all active lanes upon the thread-PC reaching a branch operation. The machine updates the lane-PC of each active lane according to targets of the branch operation. The machine selects an active lane and activates only lanes whose lane-PCs match the thread-PC. The machine decrements the lane depth counters of the selected active lanes and updates the lane-PC of each active lane upon the instruction stream reaching a first instruction. The machine assigns the lane-PC of a lane with a largest lane depth counter value to the thread-PC and activates all lanes whose lane-PCs match the thread-PC.
    Type: Grant
    Filed: August 26, 2014
    Date of Patent: April 24, 2018
    Assignee: International Business Machines Corporation
    Inventors: Gheorghe Almasi, Jose Moreira, Jessica H. Tseng, Peng Wu
  • HINGE MECHANISM AND PORTABLE ELECTRONIC DEVICE THEREOF
    Publication number: 20180101201
    Abstract: A hinge mechanism includes a shaft, a first connecting member pivoted to the shaft and connected to a first body, a second connecting member fixed to the shaft and connected to a second body, a limiting frame, a rail base, a pin movably disposed through a slot of the limiting frame, and an elastic member connected to the pin and abutting against the first connecting member for driving the pin against the rail base. The limiting frame is fixed to the first connecting body and pivoted to the shaft. The rail base is fixed to the shaft and has first, second, third arc-shaped rails and a transition rail. When the first body rotates an expanding angle relative to the second body in a first rotating direction, the pin moves along the first arc-shaped rail to the transition rail and abuts against a first stopping end surface of the transition rail.
    Type: Application
    Filed: November 21, 2016
    Publication date: April 12, 2018
    Inventor: Peng Wu
  • METHOD AND APPARATUS FOR OPERATING FPGA BOARD IN DRIVERLESS VEHICLE
    Publication number: 20180072251
    Abstract: The present application discloses a method and apparatus for operating a field-programmable gate array (FPGA) board in a driverless vehicle. The method according to a specific embodiment includes: collecting driving scenario information on a driving scenario of the driverless vehicle; determining, based on the driving scenario information, a speed at which the driverless vehicle executes a computing operation in the driving scenario; comparing the speed with a speed threshold; switching a working mode of the FPGA board in the driverless vehicle executing the computing operation to reduce power consumption of the FPGA board, in response to the speed being lower than the speed threshold. This embodiment implements the adaptive adjustment of the working mode of the FPGA board, thereby reducing the overall power consumption.
    Type: Application
    Filed: January 20, 2017
    Publication date: March 15, 2018
    Applicant: BEIJING BAIDU NETCOM SCIENCE AND TECHNOLOGY CO., LTD.
    Inventors: Zhao ZHANG, Jian OUYANG, Jing WANG, Peng WU, Liang GAO, Yupeng LI
  • Method for manufacturing a printed circuit board with high-capacity copper circuit
    Patent number: 9907167
    Abstract: A printed circuit board with high-capacity copper circuit includes a conductive trace, a first protecting layer, and a second protecting layer formed on opposite sides of the conductive trace. The conductive trace includes a base conductive trace pattern, a first conductive trace pattern, and a second conductive trace pattern. The first and second conductive trace patterns are directly formed on opposite surfaces of the base copper conductive trace pattern. A trace width of the first conductive trace pattern is the same as a line width of the second conductive trace pattern.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: February 27, 2018
    Assignees: Avary Holding (Shenzhen) Co., Limited., HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd.
    Inventors: Fang-Bo Xu, Peng Wu, Jian-Quan Shen, Ke-Jian Wu
  • APPARATUS AND METHOD FOR CONTROLLING A TUNE-AWAY OPERATION
    Publication number: 20180042014
    Abstract: A user equipment (UE) determines a tune-away gap in which the UE performs a tune-away from a first radio access technology (RAT) to a second RAT on a single radio frequency (RF) chain, and transmits an intended-false buffer status report (BSR) to modify a duration of the determined tune-away gap. The intended-false BSR indicates an intended-false value of uplink data pending in a buffer to be transmitted on the first RAT, so that an uplink grant for uplink data transmissions on the first RAT to be received at the UE is modified.
    Type: Application
    Filed: April 14, 2015
    Publication date: February 8, 2018
    Inventors: Peng Wu, Jun Deng, Xiaochen Chen, Tim Liou, Tom Chin
  • TRANSMISSION CIRCUIT FOR ETHERNET DEVICE
    Publication number: 20170373489
    Abstract: A transmission circuit including four transmission component sets for an Ethernet device is provided. Each transmission component set are coupled between an Ethernet connector and an Ethernet chip. Each transmission component set includes a transformer, two capacitors, and four transmission lines (TLs). The transformer includes four terminals and two center taps. Two diagonal terminals of the four terminals are coupled to a ground. The other two diagonal terminals of the four terminals are coupled to the Ethernet connector and, through one of the two capacitors, to the Ethernet chip via two of the four TLs, respectively. The two center taps are coupled to the Ethernet connector and, through the other one of the two capacitors, to the Ethernet chip via the other two of the four TLs, respectively.
    Type: Application
    Filed: June 14, 2017
    Publication date: December 28, 2017
    Inventors: Kun Tsen LIN, Shih Peng WU
  • METHOD AND APPARATUS FOR FAILOVER PROCESSING
    Publication number: 20170364423
    Abstract: Embodiments of the present disclosure provide a method and apparatus for failover. In an embodiment is provided a method implemented at a first node in a cluster comprising a plurality of heterogeneous nodes. The method comprises: determining whether an application at a second node in the cluster is failed; and in response to determining that the application is failed, causing migration of data and services associated with the application from the second node to a third node in the cluster, the migration involving at least one node heterogeneous to the second node in the cluster. The present disclosure further provides a method implemented at the third node in the cluster and corresponding devices and computer program products.
    Type: Application
    Filed: June 20, 2017
    Publication date: December 21, 2017
    Inventors: Peter Hailin Peng, Colin Yong Zou, Peng Wu
  • Method for analog circuit placement
    Patent number: 9830416
    Abstract: A method for analog circuit placement is proposed. The method comprises inputting a plurality of modules, a netlist and a constraint file. Next, it is performing a step of establishing a QB-tree construction. Then, a node perturbation of QB-tree is performed after establishing the QB-tree construction. Subsequently, it is performing a step of a look-ahead constraint checking to check whether meet constraints of the constraint file or not, followed by performing a QB-tree packing when meet constraints of the constraint file. Next, it is performing a process of performing a cost evaluation.
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: November 28, 2017
    Assignee: AnaGlobe Technology, Inc.
    Inventors: I-Peng Wu, Hung-Chih Ou, Yao-Wen Chang, Yu-Tsang Hsieh
  • Ligands and methods for labeling biomolecules in vivo
    Patent number: 9809560
    Abstract: Disclosed are tris(triazolylmethyl)amine ligands, and kits and methods for labeling and/or imaging a biomolecule of interest in a subject or living system.
    Type: Grant
    Filed: August 5, 2011
    Date of Patent: November 7, 2017
    Assignee: Albert Einstein College of Medicine, Inc.
    Inventors: Peng Wu, David Soriano del Amo, Wei Wang, Florence L. Marlow
  • ON-DEMAND LOADING OF DYNAMIC SCRIPTING LANGUAGE CODE FOR REDUCED MEMORY USAGE
    Publication number: 20170315830
    Abstract: A computer-implemented method and system for reducing the amount of memory space required to store applications written in dynamic scripting languages loads a program module into memory and removes a category of program code, such as debug information or function definitions, from the program module. The method and system also receives a request for debug information, or a function call or query, and determines whether or not the corresponding program code is in memory. If not, then the location in storage is identified where the program module is stored, and another copy containing the corresponding program code is loaded into memory. The corresponding program code is located and copied into the program module in memory, and a response is provided to the request.
    Type: Application
    Filed: July 18, 2017
    Publication date: November 2, 2017
    Inventors: Haichuan Wang, Handong Ye, Peng Wu
  • SEMICONDUCTOR ARRANGEMENT AND FORMATION THEREOF
    Publication number: 20170301775
    Abstract: A semiconductor arrangement and method of formation are provided. The semiconductor arrangement comprises a conductive contact in contact with a substantially planar first top surface of a first active area, the contact between and in contact with a first alignment spacer and a second alignment spacer both having substantially vertical outer surfaces. The contact formed between the first alignment spacer and the second alignment spacer has a more desired contact shape then a contact formed between alignment spacers that do not have substantially vertical outer surfaces. The substantially planar surface of the first active area is indicative of a substantially undamaged structure of the first active area as compared to an active area that is not substantially planar. The substantially undamaged first active area has a greater contact area for the contact and a lower contact resistance as compared to a damaged first active area.
    Type: Application
    Filed: July 3, 2017
    Publication date: October 19, 2017
    Inventors: Tai-I Yang, Tien-Lu LIN, Wai-Yi Lien, Chih-Hao Wang, Jiun-Peng Wu
  • On-demand loading of dynamic scripting language code for reduced memory usage
    Patent number: 9772865
    Abstract: A computer-implemented method and system for reducing the amount of memory space required to store applications written in dynamic scripting languages loads a program module into memory and removes a category of program code, such as debug information or function definitions, from the program module. The method and system also receives a request for debug information, or a function call or query, and determines whether or not the corresponding program code is in memory. If not, then the location in storage is identified where the program module is stored, and another copy containing the corresponding program code is loaded into memory. The corresponding program code is located and copied into the program module in memory, and a response is provided to the request.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: September 26, 2017
    Assignee: Futurewei Technologies, Inc.
    Inventors: Haichuan Wang, Handong Ye, Peng Wu
  • Optimizing destaging of data to physical storage devices
    Patent number: 9767021
    Abstract: Described are techniques for destaging data. Write data for write operations are stored in cache page(s). The cache may be partitioned into cache pages and write data stored thereon may be marked as write pending denoting that write data needs to be written out to physical storage. Weight values may be determined for the cache pages in accordance with factors. A first cache page may be selected having a highest such weight value where the selected first cache page includes at least some write data marked as write pending. The write data of the selected first cache page may be destaged to physical storage.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: September 19, 2017
    Assignee: EMC IP Holding Company LLC
    Inventors: Peng Wu, Rong Yu, Dan Aharoni, Alexandr Veprinsky, Amnon Naamad
  • Electromagnetic wave mode transducer
    Patent number: 9755290
    Abstract: Electromagnetic (EM) mode transition or transducer structures and related devices, techniques, and methods are described. An exemplary EM mode transition or transducer structure can comprise a waveguide cavity section configured to transmit a transverse electric mode 20 (TE20) mode of the EM waves. An exemplary EM mode transition can further comprise a fundamental mode rejection section configured to suppress or reflect a transverse electric mode 10 (TE10 mode) and a transverse electric mode 30 (TE30) mode of the EM waves.
    Type: Grant
    Filed: June 13, 2014
    Date of Patent: September 5, 2017
    Assignee: CITY UNIVERSITY OF HONG KONG
    Inventors: Quan Xue, Peng Wu
  • Foldable spin flat mop and cleaning tool including same
    Patent number: 9750386
    Abstract: A foldable spin flat mop (100) is disclosed that comprises a handle (10); and a mop head (20) connected to the handle. The mop head comprises: at least two independent cleaning plates (21), which together being able to form a coplanar and flat cleaning flat surface; and a connection mechanism disposed to rotatably connect the at least two independent cleaning plates to the handle. The connection mechanism comprises: a plurality of seats (23) provided respectively at the at least two independent cleaning plates; and at least one joint member (24) connecting the plurality of seats; wherein each of the at least two independent cleaning plates is rotatable with regard to the joint member, such that the at least two independent cleaning plates each is capable of freely rotating relative to the handle.
    Type: Grant
    Filed: October 10, 2013
    Date of Patent: September 5, 2017
    Inventors: Feng Zeng, Xiaolin Yin, Peng Wu
  • Method and system for machine learning for write command selection based on technology feedback
    Patent number: 9747040
    Abstract: Example embodiments of the present invention relate to methods, systems, and computer program products for reducing I/O latency in a storage system. The method include polling a storage system for values related to caching of I/Os in global memory for subsequent destaging to disk. The host then may determine respective write delay values for I/Os to be sent from a host communicatively coupled with the storage system according to the values related to caching of I/Os. The write delay values then may be applied to the I/Os at the host to delay sending of the I/Os by respective delay times from the host to the storage system.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: August 29, 2017
    Assignee: EMC IP Holding Company LLC
    Inventors: Ajith Balakrishnan, Bradley A. Bowlin, Rong Yu, Arieh Don, Peng Wu
  • DIFFERENTIAL PLANAR APERTURE ANTENNA
    Publication number: 20170237176
    Abstract: A planar differential aperture antenna that has a high gain and wide bandwidth at a millimeter wave band is provided. The differential aperture antenna has a cavity within it that has a height of roughly a quarter of a wavelength of the desired transmission band. The cavity is H-shaped, and has a cross shaped patch within the cavity that is fed differentially by two grounded coplanar waveguides. Two ends of the patch extend towards the ports on either side of the differential aperture antenna, and the other two ends of the patch extend into the cavity lobes, perpendicular with respect to the ports.
    Type: Application
    Filed: February 27, 2017
    Publication date: August 17, 2017
    Inventors: Quan XUE, Shaowei LIAO, Peng WU