Abstract: A radiographic imaging method includes: obtaining a posture image of an object under examination located at a shooting position between a radiation source and a detector; obtaining items concerning posture from an image based on the posture image, the items concerning posture including a region of interest of the object under examination, an imaging plane region of the detector and a radiation field region of the radiation source on the object under examination; obtaining range information and/or position information about the region of interest, the imaging plane region and the radiation field region based on the items concerning posture; and performing posture quality control using the range information and/or the position information.

Abstract: Some embodiments include a method of forming a conductive structure. A metal-containing conductive material is formed over a supporting substrate. A surface of the metal-containing conductive material is exposed to at least one radical form of hydrogen and to at least one oxidant. The exposure alters at least a portion of the metal-containing conductive material to thereby form at least a portion of the conductive structure. Some embodiments include a conductive structure which has a metal-containing conductive material with a first region adjacent to a second region. The first region has a greater concentration of one or both of fluorine and boron relative to the second region.

Abstract: A signal conversion circuit including a voltage adjustment circuit and a control circuit is provided. An input terminal and an output terminal of the voltage adjustment circuit are respectively coupled to a power voltage and an output terminal of the signal conversion circuit. The control circuit provides a control signal to a control terminal of the voltage adjustment circuit, controls the control signal to change between a first control voltage level and a second control voltage level according to a signal level of an input data signal, or decides whether to provide a default voltage to the output terminal of the voltage adjustment circuit according to the input data signal.

Abstract: Disclosed are a touch substrate and a display device. The touch substrate includes a touch electrode layer with a mesh type structure; the touch electrode layer includes the first touch electrode including first touch sub-electrodes, and the second touch electrode including second touch sub-electrodes; each first touch sub-electrode includes first touch electrode meshes, and each second touch sub-electrode includes second touch electrode meshes; the touch electrode layer further includes boundary meshes located between adjacent first touch sub-electrode and second touch sub-electrode; each boundary mesh includes at least two first mesh lines; each first mesh line is provided with a first break; second mesh lines are arranged in a first touch electrode mesh and/or a second touch electrode mesh; the second mesh lines are provided with second breaks; and a pattern shape of the first mesh line and a pattern shape of the second mesh line are different.

Abstract: A method for adaptive mapping for data compression includes determining an input/output (I/O) request pattern, dynamically switching between a segment mapping mode and a flat hash table mapping mode based on the determined I/O request pattern, updating a shared mapping table for the segment mapping mode and the flat hash table mapping mode, and adjusting an entry of the mapping table based on the determined I/O request pattern and a status of the entry.

Abstract: Disclosed are a display substrate and a display apparatus, wherein the display substrate may include a base substrate including a display region and a non-display region, and a drive circuit layer disposed on the base substrate, the drive circuit layer includes a pixel drive circuit located in the display region and a gate drive circuit located in the non-display region; a boundary of the display region includes an arc-shaped boundary, a non-display region located on an outside of the arc-shaped boundary is referred to as a rounded corner region, and the rounded corner region includes a plurality of first regions and at least one second region; the gate drive circuit is configured to provide a drive signal to the pixel drive circuit, and is partially located within a first region, and the second region is located between adjacent first regions.

Abstract: A method is directed to storing data in a non-volatile storage. The method includes writing sequentially at least a main portion of a data record in one or more logic blocks of an append-only storage zone of the non-volatile storage until the one or more first logic blocks are written full. The method also includes generating a first journal including a remainder portion of the first data record and a first journal entry for the remainder portion. A storage device control system includes a non-volatile storage and a controller for the non-volatile storage.

Abstract: A touch structure, a display panel and an electronic device. The touch structure includes: a plurality of touch sub-electrodes spaced apart from each other and a dummy electrode; the dummy electrode is embedded into at least one touch sub-electrode among the plurality of touch sub-electrodes, and is spaced apart from the touch sub-electrode where the dummy electrode is located, so as to be insulated from each other; the at least one touch sub-electrode includes a strip-shaped channel and a main body portion surrounding the dummy electrode and the channel, the strip-shaped channel penetrates through the dummy electrode, and two ends of the strip-shaped channel in an extension direction thereof are both connected to the main body portion.

Abstract: The present invention provides a target sequence of an RNA virus. The target sequence is a nucleic acid sequence fragment in the gene sequence in the RNA virus containing 20-40 bases and having not less than 95% similarity to genome sequence of human or related species such as livestock and poultry. The above-mentioned target sequence of the RNA virus is selected from SEQ ID NO. 1-SEQ ID NO. 615. The present invention also relates to a primer composition for constructing the above-mentioned target sequence, biomaterials such as antisense RNA related to the above-mentioned target sequence, and related uses such as design of a vaccine lacking the target sequence. The virus fragment with the above-mentioned sequence constructed in the present invention has the function of interacting with human genomic DNA and is similar to viral miRNA.

Abstract: A display substrate and a display device are provided, which includes: a pixel circuit, on the base substrate and including a driving transistor and a storage capacitor; the display substrate includes a first conductive layer, a second conductive layer and a first semiconductor layer, the first conductive layer includes a first connection structure, the first connection structure includes a first end and a second end, the first end is connected with the first semiconductor layer, the second end is electrically connected with a gate electrode of the driving transistor and a first electrode plate of the storage capacitor; the first conductive layer is at a side of the first semiconductor layer away from the base substrate, the second conductive layer is at a side of the first conductive layer away from the base substrate.

Abstract: Provided are a display panel, a preparation method thereof, and a display device. The display panel includes a display substrate and a touch panel including multiple touch electrodes, At least one of which includes multiple grid patterns enclosed by metal wires. At least one grid pattern includes a first edge, second edge, third edge and fourth edge that form a ring. The first edge and the third edge extend in a second direction. The second edge and the fourth edge extend in a first direction. A shape of the grid pattern includes a first curved ring, a second curved ring, a third curved ring, or a fourth curved ring. A first edge and third edge of the first curved ring are curves curved towards a direction opposite to the first direction. A first edge and third edge of the second curved ring are curves curved towards the first direction.

Abstract: A method of forming stacked vertical field effect devices is provided. The method includes forming a layer stack on a substrate, wherein the layer stack includes a first spacer layer on the substrate, a first protective liner on the first spacer layer, a first gap layer on the first protective liner, a second protective liner on the first gap layer, a second spacer layer on the second protective liner, a sacrificial layer on the second spacer layer, a third spacer layer on the sacrificial layer, a third protective liner on the third spacer layer, a second gap layer on the third protective liner, a fourth protective liner on the second gap layer, and a fourth spacer layer on the fourth protective liner. The method further includes forming channels through the layer stack, a liner layer on the sidewalls of the channels, and a vertical pillar in the channels.

Abstract: The present disclosure provides a pixel driving circuit and a display panel. The pixel drive circuit includes: a data writing sub-circuit, a threshold compensation sub-circuit, a driving sub-circuit and a storage sub-circuit, the data writing sub-circuit includes a fourth transistor, which includes a first electrode connected with a data line, a second electrode connected with a first terminal of the driving sub-circuit, and a control electrode connected with a first scan signal line, and the fourth transistor is an oxide thin film transistor; the threshold compensation sub-circuit is configured to compensate a threshold voltage of the driving sub-circuit in response to a second scan signal; the storage sub-circuit is configured to store a data voltage signal; the driving sub-circuit is configured to provide a driving current for a light emitting device to be driven according to voltages of the first terminal and a control terminal thereof.

Abstract: When performing a recycling operation on a storage device, a storage system may use or create a data buffer in the storage device, and designate the data buffer to temporarily store data of data blocks to be recycled in the storage device using direct memory access (DMA) operations that are performed internally in the storage device, without the need of reading the data of the data blocks from the storage device and writing the data into a host memory of the storage system, thereby saving or reducing the consumptions of the communication bandwidth of a communication channel between the storage system and the storage device, and the memory bandwidth of the host memory.

Abstract: In one aspect, a preparation method for ferric phosphate includes the following steps: (a) feeding a ferrous sulfate solution and a phosphate solution including hydrogen peroxide simultaneously into a first reactor for mixing and reacting to obtain nucleated ferric phosphate; wherein a molar ratio of iron element to phosphorus element in the feeding process is 1:1, and a stirring speed is 500-600 r/min; (b) discharging the nucleated ferric phosphate to a second reactor for growth to obtain amorphous ferric phosphate slurry, and post-processing the amorphous ferric phosphate slurry to obtain the high tap density ferric phosphate; wherein a stirring speed is 120-150 r/min. The first reactor is a small-volume reactor, and the second reactor is a large-volume reactor.

Abstract: Disclosed is a calibration method of a capacitor array type successive approximation register analog-to-digital converter, comprising: obtaining an actual weight value of capacitors of a target bit and an error code between the actual weight value and an ideal weight value of the capacitors of the target bit; calibrating an output code of the SAR ADC to be calibrated with the error code by corresponding addition or subtraction to obtain a final calibrated output code. The calibration method breaks through the requirement that non-binary weights must meet the redundancy, and can realize a weight calibration in a traditional binary ADC and a digital calibration by simple addition and subtraction on the basis of the original code obtained by an analog-to-digital conversion, thus effectively avoiding the error problem in the traditional technology, increasing the calibration precision and accuracy, reducing the circuit complexity and calculation complexity caused by the non-binary weights calibration.

Abstract: The present disclosure provides a method for allocating memory, computer device and storage medium. The method can achieve allocation of hard disk memory to a target application through use of free memory information of the hard disk memory and size information written into a first storage space. In addition, the free memory information of the hard disk memory is stored in system memory, and during allocation for the hard disk memory, the free memory information of the hard disk memory is directly read from the system memory.

Abstract: The present disclosure provides a pixel array and a display device. The pixel array includes first sub-pixels, second sub-pixels and third sub-pixels; the first sub-pixels and the third sub-pixels are alternately arranged along a first direction to form first pixel groups, and are alternately arranged along a second direction to form third pixel groups; the second sub-pixels are arranged along the first direction to form second pixel groups, and are arranged along the second direction to form fourth pixel groups; wherein the first pixel groups and the second pixel groups are alternately arranged in the second direction; the third pixel groups and the fourth pixel groups are alternately arranged along the first direction; wherein a shape of the second sub-pixel includes a polygon, a plurality of sides of the polygon include straight lines or arcs, and the shape of the second sub-pixel includes at most one symmetry axis.

Abstract: A system and method are described to efficiently allocate memory space with low latency overhead by allocating blocks of non-volatile memory on a storage device according to a tree data structure comprising a plurality of counter sets, each counter set including one or a plurality of counters indicating numbers of unallocated blocks of memory space within the non-volatile memory.

Abstract: Disclosed are an alignment mask, a metal mask assembly, and a preparation method therefor. The alignment mask includes a mask body. The mask body includes: multiple alignment holes; and, separating parts surrounding at least some alignment holes and used for separating the areas at where the at least some alignment holes are located from other areas, where the separation parts include at least one semi-etched line.