Abstract: A switched-mode power supply includes an input, an output, and a transformer including primary and secondary windings. The power supply also includes a synchronous rectifier coupled to selectively conduct current through the secondary winding of the transformer. The synchronous rectifier includes a source, a gate and a drain terminal. The power supply further includes a controller having a supply voltage terminal and a gate terminal to supply a control signal to the gate of the synchronous rectifier, and a circuit coupled between the supply voltage terminal of the controller and at least one of the gate terminal of the controller and the drain terminal of the synchronous rectifier to supply power from the gate terminal of the controller or the drain terminal of the synchronous rectifier to the supply voltage terminal of the controller. Methods of supplying power in switched-mode power supplies are also disclosed.

Abstract: Various embodiments of a monolithic transceiver are described, which may be fabricated on a semiconductor substrate. The monolithic transceiver includes a coherent receiver module (CRM), a coherent transmitter module (CTM), and a local oscillation splitter to feed a local oscillation to the CRM and the CTM with a tunable power ratio. The monolithic transceiver provides tunable responsivity by employing avalanche photodiodes (APDs) for opto-electrical conversion. The monolithic transceiver also employs a polarization beam rotator-splitter (PBRS) and a polarization beam rotator-combiner (PBRC) for supporting modulation schemes including polarization multiplexed quadrature amplitude modulation (PM-QAM) and polarization multiplexed quadrature phase shift keying (PM-QPSK).

Abstract: A switched-mode power supply includes an input, an output, and a transformer including primary and secondary windings. The power supply also includes a synchronous rectifier coupled to selectively conduct current through the secondary winding of the transformer. The synchronous rectifier includes a source, a gate and a drain terminal. The power supply further includes a controller having a supply voltage terminal and a gate terminal to supply a control signal to the gate of the synchronous rectifier, and a circuit coupled between the supply voltage terminal of the controller and at least one of the gate terminal of the controller and the drain terminal of the synchronous rectifier to supply power from the gate terminal of the controller or the drain terminal of the synchronous rectifier to the supply voltage terminal of the controller. Methods of supplying power in switched-mode power supplies are also disclosed.

Abstract: Various embodiments of a monolithic electro-optical (E-O) modulator are described herein. The monolithic E-O modulator may include a phase shifter having a suspended structure. The suspended structure may be realized by partially or completely removing silicon material underneath the active area of the phase shifter to form a void in the bulk silicon substrate supporting the phase shifter. The suspended structure may be utilized to result in a lower radio-frequency loss and an effective group refractive index of the phase shifter that is closer to the refractive index of silicon waveguides or optical fibers, both advantageous to enhancing the performance of the E-O modulator such as a higher operating bandwidth.

Abstract: A method for analyzing performance of an imaging device including a scanner with a phantom includes receiving image data related to a scanning, by the scanner, of a first part of the phantom including at least part of a first test component. The method also includes obtaining at least one positioning parameter indicative of a positioning manner of the phantom during the scanning. The method further includes generating a first test image based on the received image data and determining a first region of interest (ROI) related to the first test component in the first test image based on the at least one positioning parameter.

Abstract: Various embodiments of a monolithic electro-optical (E-O) modulator are described. The monolithic E-O modulator includes an active region comprising a plurality of p-n junction diodes, as well as a modulation electrode and a bias electrode that extend through the active region. The monolithic E-O modulator further includes a resistor-capacitor-bias-capacitor (RCBC) electrode structure configured to receive an electrical modulation signal, a direct-current (DC) bias voltage and a power supply voltage. Specifically, the RCBC electrode structure includes a resistor coupled to the modulation electrode and two capacitors each coupled to a respective end of the bias electrode. Beneficially, the RCBC electrode structure enables the p-n junction diodes to be biased independently from a DC level of the electrical modulation signal.

Abstract: Various embodiments of a fully integrated avalanche photodiode receiver and manufacturing method thereof are described herein. A photonic device includes a silicon-on-insulator (SOI) substrate with a buried oxide (BOX) layer therein, an avalanche photodiode integrated with the SOI substrate, a capacitor integrated with the SOI substrate, a resistor integrated with the SOI substrate, and silicon passive waveguides as well as bonding pads integrated with the SOI substrate.

Abstract: Various embodiments of a monolithic electro-optical (E-O) modulator are described herein. The monolithic E-O modulator may include a phase shifter having a suspended structure. The suspended structure may be realized by partially or completely removing silicon material underneath the active area of the phase shifter to form a void in the bulk silicon substrate supporting the phase shifter. The suspended structure may be utilized to result in a lower radio-frequency loss and an effective group refractive index of the phase shifter that is closer to the refractive index of silicon waveguides or optical fibers, both advantageous to enhancing the performance of the E-O modulator such as a higher operating bandwidth.

Abstract: Various embodiments of a compensated photonic device structure and fabrication method thereof are described herein. In one aspect, a photonic device may include a substrate and a functional layer disposed on the substrate. The substrate may be made of a first material and the functional layer may be made of a second material that is different from the first material. The photonic device may also include a compensation region formed at an interface region between the substrate and the functional layer. The compensation region may be doped with compensation dopants such that a first carrier concentration around the interface region of function layer is reduced and a second carrier concentration in a bulk region of functional layer is reduced.

Abstract: Various embodiments of a compensated photonic device structure and fabrication method thereof are described herein. A photonic device may include a silicon-on-insulator (SOI) substrate with a buried oxide (BOX) layer therein, a Si waveguide and an n-type contact layer formed on the BOX layer, a Si multiplication layer disposed on the n-type contact layer, a p-type Si charge layer disposed on the Si multiplication layer, a germanium (Ge) absorption layer disposed on the p-type Si charge layer, a p-type contact layer disposed on the Ge absorption layer, and a metal layer disposed on the p-type contact layer. A compensated region may be formed between the p-type Si charge layer and the Ge absorption layer with a portion of the compensated region in the p-type Si charge layer and another portion of the compensated region in the Ge absorption layer.

Abstract: A method for analyzing performance of an imaging device including a scanner with a phantom includes receiving image data related to a scanning, by the scanner, of a first part of the phantom including at least part of a first test component. The method also includes obtaining at least one positioning parameter indicative of a positioning manner of the phantom during the scanning. The method further includes generating a first test image based on the received image data and determining a first region of interest (ROI) related to the first test component in the first test image based on the at least one positioning parameter.

Abstract: Various embodiments of a fully integrated avalanche photodiode receiver and manufacturing method thereof are described herein. A photonic device includes a silicon-on-insulator (SOI) substrate with a buried oxide (BOX) layer therein, an avalanche photodiode integrated with the SOI substrate, a capacitor integrated with the SOI substrate, a resistor integrated with the SOI substrate, and silicon passive waveguides as well as bonding pads integrated with the SOI substrate.

Abstract: Avalanche photodiodes (APDs) having at least one top stressor layer disposed on a germanium (Ge) absorption layer are described herein. The top stressor layer can increase the tensile strain of the Ge absorption layer, thus extending the absorption of APDs to longer wavelengths beyond 1550 nm. In one embodiment, the top stressor layer has a four-layer structure, including an amorphous silicon (Si) layer disposed on the Ge absorption layer; a first silicon dioxide (SiO2) layer disposed on the amorphous Si layer, a silicon nitride (SiN) layer disposed on the first SiO2 layer, and a second SiO2 layer disposed on the SiN layer. The Ge absorption layer can be further doped by p-type dopants. The doping concentration of p-type dopants is controlled such that a graded doping profile is formed within the Ge absorption layer to decrease the dark currents in APDs.

Abstract: Various embodiments of a compensated photonic device structure and fabrication method thereof are described herein. In one aspect, a photonic device may include a substrate and a functional layer disposed on the substrate. The substrate may be made of a first material and the functional layer may be made of a second material that is different from the first material. The photonic device may also include a compensation region formed at an interface region between the substrate and the functional layer. The compensation region may be doped with compensation dopants such that a first carrier concentration around the interface region of function layer is reduced and a second carrier concentration in a bulk region of functional layer is reduced.

Abstract: Various embodiments of a compensated photonic device structure and fabrication method thereof are described herein. A photonic device may include a silicon-on-insulator (SOI) substrate with a buried oxide (BOX) layer therein, a Si waveguide and an n-type contact layer formed on the BOX layer, a Si multiplication layer disposed on the n-type contact layer, a p-type Si charge layer disposed on the Si multiplication layer, a germanium (Ge) absorption layer disposed on the p-type Si charge layer, a p-type contact layer disposed on the Ge absorption layer, and a metal layer disposed on the p-type contact layer. A compensated region may be formed between the p-type Si charge layer and the Ge absorption layer with a portion of the compensated region in the p-type Si charge layer and another portion of the compensated region in the Ge absorption layer.

Abstract: Various embodiments of a compensated photonic device structure and fabrication method thereof are described herein. In one aspect, a photonic device may include a substrate and a functional layer disposed on the substrate. The substrate may be made of a first material and the functional layer may be made of a second material that is different from the first material. The photonic device may also include a compensation region formed at an interface region between the substrate and the functional layer. The compensation region may be doped with compensation dopants such that a first carrier concentration around the interface region of function layer is reduced and a second carrier concentration in a bulk region of functional layer is reduced.

Abstract: Various embodiments of a novel structure of a Ge/Si avalanche photodiode with an integrated heater, as well as a fabrication method thereof, are provided. In one aspect, a doped region is formed either on the top silicon layer or the silicon substrate layer to function as a resistor. When the environmental temperature decreases to a certain point, a temperature control loop will be automatically triggered and a proper bias is applied along the heater, thus the temperature of the junction region of a Ge/Si avalanche photodiode is kept within an optimized range to maintain high sensitivity of the avalanche photodiode and low bit-error rate level.

Abstract: A high-speed germanium on silicon (Ge/Si) avalanche photodiode may include a substrate layer, a bottom contact layer disposed on the substrate layer, a buffer layer disposed on the bottom contact layer, an electric field control layer disposed on the buffer layer, an avalanche layer disposed on the electric field control layer, a charge layer disposed on the avalanche layer, an absorption layer disposed on the charge layer, and a top contact layer disposed on the absorption layer. The electric field contact layer may be configured to control an electric field in the avalanche layer.

Abstract: Various embodiments of a germanium-on-silicon (Ge—Si) avalanche photodiode are provided. In one aspect, the Ge—Si avalanche photodiode utilizes a silicon carrier-energy-relaxation layer to reduce the energy of holes drifting into absorption layer where the absorption material has lower ionization threshold, thereby suppressing multiplication noise and increasing the gain-bandwidth product of the avalanche photodiode.

Abstract: Various embodiments of a photonic device and fabrication method thereof are described herein. A device may include a substrate, a bottom contact layer, a current confinement layer, an intrinsic layer, an absorption layer, and a top contact layer. The bottom contact layer may be of a first polarity and may be disposed on the substrate. The current confinement layer may be disposed on the bottom contact layer. The intrinsic layer may be disposed on the current confinement layer. The absorption layer may be disposed on the intrinsic layer. The top contact layer may be of a second polarity and may be disposed on the absorption layer. The second polarity is opposite to the first polarity.