Patents by Inventor Pengfei Qi

Pengfei Qi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250149699
    Abstract: A battery module includes a plurality of cells, an end plate, and a side plate. The end plate and the side plate define an accommodating area, and the plurality of cells are sequentially arranged in the accommodating area. The side plate is provided with an avoidance notch configured to avoid a crossbeam or longitudinal beam of a lower casing, and the cells are arranged to avoid a position in the accommodating area corresponding to the avoidance notch, so that the battery module is mounted across the crossbeam or the longitudinal beam of the lower casing.
    Type: Application
    Filed: December 1, 2022
    Publication date: May 8, 2025
    Inventors: Pengfei QI, Jun GUO, Chao XU
  • Publication number: 20250132438
    Abstract: A support member for a battery pack is provided. The battery pack includes a case and a cell component arranged in the case, and the cell component includes a top cover and a pole arranged on the top cover. The support member is configured to be arranged between the top cover and the case, to define an avoidance part between the pole and the case. The support member includes an upper support rib and a lower support rib connected with each other, the upper support rib is configured to abut against the top cover, and the lower support rib is configured to abut against the case.
    Type: Application
    Filed: August 24, 2022
    Publication date: April 24, 2025
    Inventor: Pengfei Qi
  • Publication number: 20220368273
    Abstract: Disclosed is a BIPV module, comprising a stack of a front light-transmitting plate, a power generation layer set, a bus wiring layer and a rear light-transmitting plate, wherein one of the rear light-transmitting plate and the front light-transmitting plate is provided with a pattern layer coated with color glaze at a side thereof close to the other one of the front light-transmitting plate and the rear light-transmitting plate, the bus wiring layer is attached onto the power generation layer set to form a pin, and the power generation layer set and the bus wiring layer are encapsulated between the front and rear light-transmitting plates by an encapsulation adhesive.
    Type: Application
    Filed: August 1, 2019
    Publication date: November 17, 2022
    Inventors: Xiaohui YU., Pengfei QI, Shiqiang CHEN, Gaiyu NIU, Huayi HU, Zhilin PAN
  • Patent number: 9129807
    Abstract: A method for synthesis of silicon nanowires provides a growth reactor having a decomposition zone and a deposition zone. A precursor gas introduced into the decomposition zone is disassociated to form an activated species that reacts with catalyst materials located in the deposition zone to deposit nano-structured materials on a low melting point temperature substrate in the deposition zone. A decomposition temperature in the decomposition zone is greater than a melting point temperature of the low melting point temperature substrate. The silicon nanowire are grown directly on the low melting point temperature substrate in the deposition zone to prevent the higher temperatures in the decomposition zone from damaging the molecular structure and/or integrity of the lower melting point temperature substrate located in the deposition zone.
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: September 8, 2015
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Pengfei Qi, William S. Wong
  • Patent number: 8956978
    Abstract: Nanotube devices and approaches therefore involve the formation and/or implementation of substantially semiconducting single-walled nanotubes. According to an example embodiment of the present invention, substantially semiconducting single-walled nanotubes couple circuit nodes in an electrical device. In some applications, semiconducting and metallic nanotubes having a diameter in a threshold range are exposed to an etch gas that selectively etches the metallic nanotubes, leaving substantially semiconducting nanotubes coupling the circuit nodes.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: February 17, 2015
    Assignee: The Board of Trustees of the Leland Stanford Junior Univerity
    Inventors: Hongjie Dai, Guangyu Zhang, Pengfei Qi
  • Publication number: 20140073117
    Abstract: A method for synthesis of silicon nanowires provides a growth reactor having a decomposition zone and a deposition zone. A precursor gas introduced into the decomposition zone is disassociated to form an activated species that reacts with catalyst materials located in the deposition zone to deposit nano-structured materials on a low melting point temperature substrate in the deposition zone. A decomposition temperature in the decomposition zone is greater than a melting point temperature of the low melting point temperature substrate. The silicon nanowire are grown directly on the low melting point temperature substrate in the deposition zone to prevent the higher temperatures in the decomposition zone from damaging the molecular structure and/or integrity of the lower melting point temperature substrate located in the deposition zone.
    Type: Application
    Filed: November 15, 2013
    Publication date: March 13, 2014
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Pengfei QI, William S. WONG
  • Patent number: 8603246
    Abstract: A method for synthesis of silicon nanowires provides a growth reactor having a decomposition zone and a deposition zone. A precursor gas introduced into the decomposition zone is disassociated to form an activated species that reacts with catalyst materials located in the deposition zone to deposit nano-structured materials on a low melting point temperature substrate in the deposition zone. A decomposition temperature in the decomposition zone is greater than a melting point temperature of the low melting point temperature substrate. The silicon nanowire are grown directly on the low melting point temperature substrate in the deposition zone to prevent the higher temperatures in the decomposition zone from damaging the molecular structure and/or integrity of the lower melting point temperature substrate located in the deposition zone.
    Type: Grant
    Filed: January 30, 2008
    Date of Patent: December 10, 2013
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Pengfei Qi, William S Wong
  • Publication number: 20130298830
    Abstract: A method for synthesis of silicon nanowires provides a growth reactor having a decomposition zone and a deposition zone. A precursor gas introduced into the decomposition zone is disassociated to form an activated species that reacts with catalyst materials located in the deposition zone to deposit nano-structured materials on a low melting point temperature substrate in the deposition zone. A decomposition temperature in the decomposition zone is greater than a melting point temperature of the low melting point temperature substrate. The silicon nanowire are grown directly on the low melting point temperature substrate in the deposition zone to prevent the higher temperatures in the decomposition zone from damaging the molecular structure and/or integrity of the lower melting point temperature substrate located in the deposition zone.
    Type: Application
    Filed: January 30, 2008
    Publication date: November 14, 2013
    Applicant: PALO ALTO RESEARCH CENTER, INCORPORATED
    Inventors: Pengfei QI, William S. WONG
  • Patent number: 8059975
    Abstract: A system of diagnosing a printer or photocopying system using a flexible diagnostic sheet is described. In the system, a thin diagnostic sheet including a plurality of sensors formed on the sheet is run through the paper path of the printing system. The printing system subjects the diagnostic sheet to the printing process, including the deposition of fuser oil and toner on the sheet. Sensors on the sheet record various parameters, including but not limited to the amount of fuser oil deposited and the charge on various toner particles. The information is transmitted to service personnel or the printer end user to enable timely repair of the printer.
    Type: Grant
    Filed: December 18, 2008
    Date of Patent: November 15, 2011
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Michael L Chabinyc, Tse Nga Ng, William S Wong, Ashish Pattekar, John E Northrup, Pengfei Qi
  • Patent number: 8000613
    Abstract: A system, including an improved sensor, for determining toner particle uniformity is described. The sensor measures toner particle charge, typically be having the charge on the toner particle control a current flow through the channel of a thin film transistor. By measuring the charge on many toner particles, the system determines whether sufficient toner degradation has occurred that the toner should be replaced. The sensor is particularly suitable for being formed on a thin diagnostic sheet that is input through the paper path of a printing system.
    Type: Grant
    Filed: December 18, 2008
    Date of Patent: August 16, 2011
    Assignee: Palo Alto Research Center Incorporated
    Inventors: William S Wong, Michael L Chabinyc, Sanjiv Sambandan, Pengfei Qi
  • Publication number: 20110167526
    Abstract: A stress-engineered microspring is formed generally in the plane of a substrate. A nanowire (or equivalently, a nanotube) is formed at the tip thereof, also in the plane of the substrate. Once formed, the length of the nanowire may be defined, for example photolithographically. A sacrificial layer underlying the microspring may then be removed, allowing the engineered stresses in the microspring to cause the structure to bend out of plane, elevating the nanowire off the substrate and out of plane. Use of the nanowire as a contact is thereby provided. The nanowire may be clamped at the tip of the microspring for added robustness. The nanowire may be coated during the formation process to provide additional functionality of the final device.
    Type: Application
    Filed: March 10, 2011
    Publication date: July 7, 2011
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Eugene Chow, Pengfei Qi
  • Publication number: 20110163061
    Abstract: A stress-engineered microspring is formed generally in the plane of a substrate. A nanowire (or equivalently, a nanotube) is formed at the tip thereof, also in the plane of the substrate. Once formed, the length of the nanowire may be defined, for example photolithographically. A sacrificial layer underlying the microspring may then be removed, allowing the engineered stresses in the microspring to cause the structure to bend out of plane, elevating the nanowire off the substrate and out of plane. Use of the nanowire as a contact is thereby provided. The nanowire may be clamped at the tip of the microspring for added robustness. The nanowire may be coated during the formation process to provide additional functionality of the final device.
    Type: Application
    Filed: March 10, 2011
    Publication date: July 7, 2011
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Eugene Chow, Pengfei Qi
  • Publication number: 20110089402
    Abstract: One aspect of the invention involves an article of manufacture that includes a dielectric layer with an array of pores, and an array of nanowires at least partially contained within the array of pores. A respective nanowire in the array of nanowires is formed within a respective pore in the array of pores. Nanowires in the array of nanowires include a core semiconducting region with a first type of, a shell semiconducting region with a second type of doping, and a junction region between the core semiconducting region and the shell semiconducting. Additionally, the article of manufacture includes a first conducting layer electrically coupled to a plurality of shell semiconducting regions for a plurality of nanowires in the array of nanowires, as well as a second conducting layer electrically coupled to a plurality of core semiconducting regions for a plurality of nanowires in the array of nanowires.
    Type: Application
    Filed: April 9, 2010
    Publication date: April 21, 2011
    Inventor: Pengfei Qi
  • Patent number: 7927905
    Abstract: A stress-engineered microspring is formed generally in the plane of a substrate. A nanowire (or equivalently, a nanotube) is formed at the tip thereof, also in the plane of the substrate. Once formed, the length of the nanowire may be defined, for example photolithographically. A sacrificial layer underlying the microspring may then be removed, allowing the engineered stresses in the microspring to cause the structure to bend out of plane, elevating the nanowire off the substrate and out of plane. Use of the nanowire as a contact is thereby provided. The nanowire may be clamped at the tip of the microspring for added robustness. The nanowire may be coated during the formation process to provide additional functionality of the final device.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: April 19, 2011
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Eugene Michael Chow, Pengfei Qi
  • Publication number: 20100158544
    Abstract: A system of diagnosing a printer or photocopying system using a flexible diagnostic sheet is described. In the system, a thin diagnostic sheet including a plurality of sensors formed on the sheet is run through the paper path of the printing system. The printing system subjects the diagnostic sheet to the printing process, including the deposition of fuser oil and toner on the sheet. Sensors on the sheet record various parameters, including but not limited to the amount of fuser oil deposited and the charge on various toner particles. The information is transmitted to service personnel or the printer end user to enable timely repair of the printer.
    Type: Application
    Filed: December 18, 2008
    Publication date: June 24, 2010
    Applicant: Palo Alto Research Center Incorporated
    Inventors: Michael L. Chabinyc, Tse Nga Ng, William S. Wong, Ashish Pattekar, John E. Northrup, Pengfei Qi
  • Publication number: 20100158548
    Abstract: A system, including an improved sensor, for determining toner particle uniformity is described. The sensor measures toner particle charge, typically be having the charge on the toner particle control a current flow through the channel of a thin film transistor. By measuring the charge on many toner particles, the system determines whether sufficient toner degradation has occurred that the toner should be replaced. The sensor is particularly suitable for being formed on a thin diagnostic sheet that is input through the paper path of a printing system.
    Type: Application
    Filed: December 18, 2008
    Publication date: June 24, 2010
    Applicant: Palo Alto Research Center Incorporated
    Inventors: William S. Wong, Michael L. Chabinyc, Sanjiv Sambandan, Pengfei Qi
  • Publication number: 20090200539
    Abstract: Composite nanorod-based structures for generating electricity are disclosed. One embodiment is an article of manufacture that includes a first layer with an array of nanowires and a dielectric material. The nanowires include: a core semiconducting region with a first type of doping; a shell semiconducting region with a second type of doping; and a junction region between the core semiconducting region and the shell semiconducting region. The first type of doping is different from the second type of doping. The shell region length is less than the core region length. The shell semiconducting region surrounds a portion of the core semiconducting region over a length of the core semiconducting region corresponding to the junction region length. A second layer comprising a conducting material contacts the top surface of the first layer. A third layer comprising a conducting material contacts the bottom surface of the first layer.
    Type: Application
    Filed: February 9, 2009
    Publication date: August 13, 2009
    Inventor: Pengfei Qi
  • Publication number: 20090159996
    Abstract: A stress-engineered microspring is formed generally in the plane of a substrate. A nanowire (or equivalently, a nanotube) is formed at the tip thereof, also in the plane of the substrate. Once formed, the length of the nanowire may be defined, for example photolithographically. A sacrificial layer underlying the microspring may then be removed, allowing the engineered stresses in the microspring to cause the structure to bend out of plane, elevating the nanowire off the substrate and out of plane. Use of the nanowire as a contact is thereby provided. The nanowire may be clamped at the tip of the microspring for added robustness. The nanowire may be coated during the formation process to provide additional functionality of the final device.
    Type: Application
    Filed: December 21, 2007
    Publication date: June 25, 2009
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Eugene Chow, Pengfei Qi