Abstract: An array substrate, a display panel, and a display device are provided. The array substrate includes sub-pixel includes a pixel circuit, and the pixel circuit includes a light emitting element, a storage capacitor, a driving transistor, a data writing transistor, a data line and a first connection structure. The driving transistor is configured to control the light emitting element to emit light; the data line is connected to the first electrode of the data writing transistor and configured to provide a data signal for the data writing transistor; the data writing transistor is configured to write the data signal into the gate electrode of the driving transistor; and the first connection structure is connected to both the gate electrode of the driving transistor and a first electrode plate of the storage capacitor, and the first connection structure and the data line are provided in different layers.

Abstract: Provided are a display substrate and a preparation method thereof, and a display device. A display region and a binding region located at one side of the display region are comprised. The display region comprises a driving structure layer, an organic insulating layer disposed on the driving structure layer and a light-emitting element disposed on the organic insulating layer, the driving structure layer comprises a pixel driving circuit, and the light-emitting element is connected with the pixel driving circuit. The binding region comprises a binding structure layer, an organic insulating layer and an isolation dam disposed on the binding structure layer, and an inorganic encapsulation layer disposed on the organic insulating layer and the isolation dam, the binding structure layer comprises a power line connected with the pixel driving circuit; at least one isolation groove is disposed on the organic insulating layer of the binding region.

Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate, and a shift register unit, a first clock signal line, and a second clock signal line that are provided on the base substrate. The shift register unit includes an input circuit, an output circuit, a first control circuit, a second control circuit, and an output control circuit, and the second control circuit includes a first noise reduction transistor and a second noise reduction transistor; and the input circuit includes an input transistor, the input transistor and the first noise reduction transistor are sequentially arranged in the first direction, and an imaginary line of a channel region of the first noise reduction transistor extending in the second direction does not intersect with an imaginary line of an active layer of the input transistor extending in the second direction.

Abstract: A display substrate and an electronic device are provided. The display substrate includes a base substrate, including a display region and a peripheral region on at least one side of the display region; and a shift register unit and a first clock signal line in the peripheral region of the base substrate, wherein the first clock signal line extends along a first direction on the base substrate, and is connected to a first clock signal terminal to be configured to provide a first clock signal to the shift register unit; the shift register unit includes an input circuit, an output circuit, a first control circuit, and an output control circuit; the output control circuit includes an output control transistor and a first capacitor, and the output circuit includes an output transistor and a second capacitor.

Abstract: A first planarization layer, an anode lap joint later, a pixel defining layer are between the first dam and the display area; the anode lap joint layer includes a main body portion and sharp angle portions; the sharp angle portion at least includes a first side edge close to the display area; the pixel defining layer wraps a border of the anode lap joint layer and has a first groove extending from one to the other sharp angle portion. An edge of the first groove adjacent to the first side edge of the sharp angle portion is a second side edge; and an orthographic projection of the second side edge on a base substrate is in an orthographic projection of the third groove on the base substrate.

Abstract: A display substrate and a manufacturing method thereof, and a display device are provided. The display substrate includes a base substrate, and includes a shift register unit, a first clock signal line, and a second clock signal line in a peripheral region; a first portion and a second portion of a first connection wire of the display substrate are connected to a first gate electrode of a first control transistor of the shift register unit; an orthographic projection of the first portion on the base substrate is on a side of an orthographic projection of an active layer of the first control transistor on the base substrate away from a display region; and an orthographic projection of the second portion on the base substrate is on a side of the orthographic projection of the active layer of the first control transistor on the base substrate close to the display region.

Abstract: Provided are a display substrate and a preparation method thereof, and a display device. A display region and a binding region located at one side of the display region are comprised. The display region comprises a driving structure layer, an organic insulating layer disposed on the driving structure layer and a light-emitting element disposed on the organic insulating layer, the driving structure layer comprises a pixel driving circuit, and the light-emitting element is connected with the pixel driving circuit. The binding region comprises a binding structure layer, an organic insulating layer and an isolation dam disposed on the binding structure layer, and an inorganic encapsulation layer disposed on the organic insulating layer and the isolation dam, the binding structure layer comprises a power line connected with the pixel driving circuit; at least one isolation groove is disposed on the organic insulating layer of the binding region.

Abstract: A method for manufacturing a core-shell coaxial gallium nitride (GaN) piezoelectric nanogenerator is provided. A mask covering a center part of a gallium nitride wafer is removed. An electrodeless photoelectrochemical etching is performed on the gallium nitride wafer to form a primary GaN nanowire array on a surface of the gallium nitride wafer. A precious metal layer provided on the surface of the gallium nitride wafer is removed and an alumina layer is deposited on the surface of the gallium nitride wafer to cover the primary GaN nanowire array to obtain a core-shell coaxial GaN nanowire array. A first conductive layer is provided on a flexible substrate to which the core-shell coaxial GaN nanowire array is transferred. A second conductive layer is provided at a top end of the core-shell coaxial GaN nanowire array, and is connected to an external circuit to obtain the core-shell coaxial GaN piezoelectric nanogenerator.

Abstract: A display module (10) includes: a display panel (12) and a circuit board (14) coupled to the display panel (12). The display panel (12) includes a driving chip (122) and a display unit (124); and the circuit board (14) includes a first filter element (142), wherein the first filter element (142) is coupled to the driving chip (122) and the display unit (124), and a direct current signal output by the driving chip (122) is filtered by the first filter element (142) and then transmitted to the display unit (124). The present disclosure also provides a display apparatus (100).

Abstract: A display substrate, a manufacturing method and a display device are provided. At least one of the plurality of shift register units in the scan driving circuit includes an output circuit including an output transistor and an output reset transistor; a length of the active layer of the output transistor/the output reset transistor in the first direction is a first length/a second length, and a sum thereof is an output active length; a smaller one of minimum width of the active layer of the output transistor and the output reset transistor in a second direction is a first output active width, the first direction intersects the second direction; a ratio of the output active length to the first output active width is within a first predetermined ratio range greater than or equal to 3 and less than or equal to 11.

Abstract: Provided are a display panel, a manufacturing method thereof, and a display device. The display panel includes an alignment mark region arranged within a flat region of a peripheral region of the display panel. The peripheral region is a region of the display panel other than an active area of the display panel. An alignment mark pattern is arranged within the alignment mark region, and/or at least one film layer within the alignment mark region is hollowed out.

Abstract: A display substrate and manufacturing method thereof, and a display device are provided. The display substrate includes a base substrate, and a shift register unit and a first clock signal line that are on the base substrate, the first clock signal line extends along a first direction on the base substrate and is configured to provide a first clock signal to the shift register unit, the shift register unit includes an input circuit, an output circuit, a first control circuit and an output control circuit, and the input circuit includes an input transistor, an active layer of the input transistor is in a strip shape extending along a second direction, and the second direction is different from the first direction.

Abstract: A display substrate, a method of manufacturing the same, and a display apparatus are provided. Multiple subpixels in the display substrate include first and second subpixels. Each subpixel includes a power signal line pattern and a light-emitting element. The power signal line pattern includes first and second power line portions. At least a part of the first power line portion extends in a second direction. The light-emitting element includes an anode pattern. In the display substrate, an overlap between the anode pattern of the first subpixel and the power signal line pattern is larger in area than an overlap between the anode pattern of the second subpixel and the power signal line pattern, an overlap between the anode pattern of the first subpixel and the first power line portion is larger in area than an overlap between the anode pattern of the first subpixel and the second power line portion.

Abstract: A display substrate includes: a base substrate; a plurality of sub-pixels, each sub-pixel including a light-emission device including a first electrode; a plurality of signal lines including at least a first signal line and a second signal line; a signal line lead in a non-display area; and a signal line transfer structure on the base substrate, wherein the signal line transfer structure is configured to connect the signal line lead and the second signal line, the signal line transfer structure and the first signal line are located in the same layer, and the signal line transfer structure is spaced apart from the first signal line. An orthographic projection of the first electrode of at least one of the sub-pixels on the base substrate at least partially overlaps with an orthographic projection of each of the first signal line and the signal line transfer structure on the base substrate.

Abstract: A display substrate, a manufacturing method thereof, and a display device are provided. A pixel region is provided with a light emission function layer on a base substrate of the display substrate, and a separation region is provided with at least one first barrier structure. The first barrier structure includes a stopper pattern and a first separation component. A side surface of the first separation component has a recess, and a portion of the light emission function layer extending to the separation region is disconnected on the side of the first separation component. The separation region is provided with an inorganic layer structure on the base substrate. The inorganic layer structure includes multiple stacked inorganic film layers, the stopper pattern is located between two adjacent inorganic film layers and the first separation component is located on a side of the inorganic layer structure away from the base substrate.

Abstract: The present application discloses a display module and a manufacturing method thereof, and a mobile terminal. The display module includes a printed circuit board connected to a backlight flexible circuit board. A side of the backlight flexible circuit board connected to the printed circuit board comprises at least two first bonding regions, wherein each of the first bonding regions includes at least two first bonding terminals distributed therein, and wherein a distance between any two adjacent first bonding regions is greater than a distance between any two adjacent first bonding terminals in each of the first bonding regions.

Abstract: Provided are an array substrate and a display device. The array substrate includes: a base substrate including a display area and a peripheral area including a first peripheral area; plurality of sub-pixels and data lines; a plurality of control signal lines, data signal input lines and a multiplexing circuit. At least one multiplexing unit includes a plurality of switching transistors, at least one of which including: a first active layer, a first gate including a first gate portion and a second gate portion spaced apart and electrically connected to a control signal line; two first electrodes electrically connected to the first active layer and a data signal input line; and a second electrode electrically connected to the first active layer and one of at least two data lines, an orthographic projection of the second electrode on the base substrate being located between that of the two first electrodes.

Abstract: A display substrate and a display device are disclosed. In the display substrate, a plurality of openings include a plurality of opening groups, the plurality of opening groups include a plurality of opening group rows, each of the opening groups includes a first opening and a second opening, the plurality of opening group rows includes a first opening group row and a second opening group row, the spacer is located between the first opening of the first opening group row and the second opening of the second opening group row, an orthographic projection of the first opening includes a first long edge, and an orthographic projection of the second opening includes a second long edge, the first long edge is parallel to the second long edge, an extension line of the first long edge is misaligned from an extension line of the second long edge.

Abstract: A display panel, comprising a first insulating structural layer, a first crack detection line, a second insulating structural layer and a second crack detection line which are sequentially arranged on a substrate, wherein the first crack detection line and the second crack detection line are both located in a peripheral area and are arranged around a display area, one end of the first crack detection line is configured to receive a detection signal, and the other end of the first crack detection line is configured to output a first output signal, and one end of the second crack detection line is configured to receive a detection signal and the other end of the second crack detection line is configured to output a second output signal.

Abstract: A display panel, a display screen, and an electronic apparatus are provided. Wherein, the display panel includes a first limiting part and a second limiting part, wherein the first limiting part and the second limiting part are configured to limit an identification pattern within a preset region; a first sealing part disposed between the first limiting part and the second limiting part and disposed on a first side of the identification pattern; and a first vacuum area disposed on a second side of the identification pattern.