Abstract: Disclosed are a display apparatus, a drive chip, and an electronic device. When determining that a disconnected signal line exists, the drive chip sends a control signal to a signal line repair module, so that when a shift output end of the first shift unit corresponding to the disconnected signal line outputs an enable signal, a selector switch corresponding to the shift output end is turned on, and then a connection control unit keeps outputting a turn-on signal to a control end of a corresponding connection switch.

Abstract: Disclosed are a display apparatus, a drive chip, and an electronic device. When determining that a disconnected signal line (DL) exists, a drive chip sends a control signal to a signal line repair module, so that shift output ends (OUT) of a plurality of shift units sequentially output enable signals, and the shift unit corresponding to a connection switch electrically connected to the disconnected signal line (DL) continuously outputs enable signals, so that the connection switch electrically connected to the disconnected signal line (DL) is continuously turned on. The display apparatus may repair a disconnected signal line without being returned to a factory and a manual operation.

Abstract: Disclosed are a display apparatus, a drive chip, and an electronic device. When determining that a disconnected signal line exists, a drive chip sends a control signal to a signal line repair module, so that a shift output end of a first shift unit corresponding to the disconnected signal line outputs an enable signal, so as to control a corresponding connection switch in a connection switch group to be turned on, to enable the disconnected signal line to be electrically connected to a repair line. The display apparatus may repair a disconnected signal line without being returned to a factory and a manual operation.

Abstract: The present application provides a gate driving unit circuit and a method of driving the same, a gate driving circuit and a display apparatus. The gate driving unit circuit includes a shift register and a plurality of driving signal output sub-circuits. Each driving signal output sub-circuit corresponds to one of gate lines on an array substrate, is coupled to a first power supply terminal and a signal output terminal of the shift register, and also coupled to a corresponding one of driving scan signal lines. Each driving signal output sub-circuit is configured to output, under the control of a signal output by the signal output terminal of the shift register, a driving scan signal provided by the corresponding driving scan signal line or an OFF voltage provided by the first power supply terminal to the corresponding gate line.

Abstract: Disclosed are a display apparatus, a drive chip, and an electronic device. When determining that a disconnected signal line exists, a drive chip sends a control signal to a signal line repair module, so that a shift output end of a first shift unit corresponding to the disconnected signal line outputs an enable signal, so as to control a corresponding connection switch in a connection switch group to be turned on, to enable the disconnected signal line to be electrically connected to a repair line. The display apparatus may repair a disconnected signal line without being returned to a factory and a manual operation.

Abstract: Disclosed are a display apparatus, a drive chip, and an electronic device. When determining that a disconnected signal line (DL) exists, a drive chip sends a control signal to a signal line repair module, so that shift output ends (OUT) of a plurality of shift units sequentially output enable signals, and the shift unit corresponding to a connection switch electrically connected to the disconnected signal line (DL) continuously outputs enable signals, so that the connection switch electrically connected to the disconnected signal line (DL) is continuously turned on. The display apparatus may repair a disconnected signal line without being returned to a factory and a manual operation.

Abstract: The present application provides a gate driving unit circuit and a method of driving the same, a gate driving circuit and a display apparatus. The gate driving unit circuit includes a shift register and a plurality of driving signal output sub-circuits. Each driving signal output sub-circuit corresponds to one of gate lines on an array substrate, is coupled to a first power supply terminal and a signal output terminal of the shift register, and also coupled to a corresponding one of driving scan signal lines. Each driving signal output sub-circuit is configured to output, under the control of a signal output by the signal output terminal of the shift register, a driving scan signal provided by the corresponding driving scan signal line or an OFF voltage provided by the first power supply terminal to the corresponding gate line.

Abstract: Disclosed are a display apparatus, a drive chip, and an electronic device. When determining that a disconnected signal line exists, the drive chip sends a control signal to a signal line repair module, so that when a shift output end of the first shift unit corresponding to the disconnected signal line outputs an enable signal, a selector switch corresponding to the shift output end is turned on, and then a connection control unit keeps outputting a turn-on signal to a control end of a corresponding connection switch.

Abstract: The present application provides a gate driving unit circuit and a method of driving the same, a gate driving circuit and a display apparatus. The gate driving unit circuit includes a shift register and a plurality of driving signal output sub-circuits. Each driving signal output sub-circuit corresponds to one of gate lines on an array substrate, is coupled to a first power supply terminal and a signal output terminal of the shift register, and also coupled to a corresponding one of driving scan signal lines. Each driving signal output sub-circuit is configured to output, under the control of a signal output by the signal output terminal of the shift register, a driving scan signal provided by the corresponding driving scan signal line or an OFF voltage provided by the first power supply terminal to the corresponding gate line.

Abstract: The present application provides a gate driving unit circuit and a method of driving the same, a gate driving circuit and a display apparatus. The gate driving unit circuit includes a shift register and a plurality of driving signal output sub-circuits. Each driving signal output sub-circuit corresponds to one of gate lines on an array substrate, is coupled to a first power supply terminal and a signal output terminal of the shift register, and also coupled to a corresponding one of driving scan signal lines. Each driving signal output sub-circuit is configured to output, under the control of a signal output by the signal output terminal of the shift register, a driving scan signal provided by the corresponding driving scan signal line or an OFF voltage provided by the first power supply terminal to the corresponding gate line.

Abstract: An optical film, a manufacturing method thereof and a display device are provided. The optical film includes a photonic crystal film substrate and a plurality of linear defective portions penetrating the photonic crystal film substrate in a thickness direction in the photonic crystal film substrate. A lattice period of each of the linear defective portions is different from a lattice period of the photonic crystal film substrate, and the photonic crystal film substrate includes a plurality of first regions and a plurality of second regions. The first regions and the second regions are alternately distributed along at least one direction in a plane where the photonic crystal thin film is located. The linear defective portion located in each of the first regions has a first light exiting direction. The linear defective portion in each of the second regions has a second light exiting direction.

Abstract: A touch circuit includes a touch circuit, a first energy storage circuit, a second energy storage circuit and a resetting circuit. A first end of the first energy storage circuit is connected to a control end of the touch circuit, and a second end thereof is connected to a first voltage input end. A first end of the second energy storage circuit is connected to a first conductive line, and a second end thereof is connected to the control end of the touch circuit. A first end of the touch circuit is connected to the first conductive line, and a second end thereof is connected to a third conductive line. A control end of the resetting circuit is connected to a second conductive line, a first end thereof is connected to the third conductive line, and a second end thereof is connected to a second voltage input end.

Abstract: A pixel circuit includes a liquid crystal capacitor, a selection unit, a gray scale writing unit, and a reset unit. The selection unit is configured to determine whether to charge the liquid crystal capacitor according to a row control signal and a column control signal. The gray scale writing unit is configured to apply a gray scale voltage signal to the liquid crystal capacitor, when the selection unit determines to charge the liquid crystal capacitor, and an application duration of the gray scale voltage signal controls a gray scale level displayed by the liquid crystal capacitor. The reset unit is configured to disconnect the gray scale writing unit and the liquid crystal capacitor to stop charging the liquid crystal capacitor upon receiving the reset signal, and reset the voltage of the liquid crystal capacitor to an initial state.

Abstract: An optical film, a manufacturing method thereof and a display device are provided. The optical film includes a photonic crystal film substrate and a plurality of linear defective portions penetrating the photonic crystal film substrate in a thickness direction in the photonic crystal film substrate. A lattice period of each of the linear defective portions is different from a lattice period of the photonic crystal film substrate, and the photonic crystal film substrate includes a plurality of first regions and a plurality of second regions. The first regions and the second regions are alternately distributed along at least one direction in a plane where the photonic crystal thin film is located. The linear defective portion located in each of the first regions has a first light exiting direction. The linear defective portion in each of the second regions has a second light exiting direction.

Abstract: An array substrate, a display panel, a display device, an operating method, and a manufacturing method are disclosed. The array substrate includes a wiring structure formed on a base substrate, and the wiring structure includes a common electrode line for connecting a common electrode, and a plurality of signal lines. The plurality of signal lines include at least one pair of signal lines, and the pair of signal lines include a first signal line and a second signal line. The first signal line is disposed on a first side of the common electrode line and is configured to transmit a driving signal for a gate driving circuit. The second signal line is disposed on a second side of the common electrode line and is configured to transmit an inverted signal of the driving signal.

Abstract: A pixel circuit includes a liquid crystal capacitor, a selection unit, a gray scale writing unit, and a reset unit. The selection unit is configured to determine whether to charge the liquid crystal capacitor according to a row control signal and a column control signal. The gray scale writing unit is configured to apply a gray scale voltage signal to the liquid crystal capacitor, when the selection unit determines to charge the liquid crystal capacitor, and an application duration of the gray scale voltage signal controls a gray scale level displayed by the liquid crystal capacitor. The reset unit is configured to disconnect the gray scale writing unit and the liquid crystal capacitor to stop charging the liquid crystal capacitor upon receiving the reset signal, and reset the voltage of the liquid crystal capacitor to an initial state.

Abstract: A touch panel, a display device and a touch detection method are provided. The touch panel includes a base substrate, a plurality of transmitter groups and a receiver. The base substrate has a touch surface configured to receive a touch operation, each of the plurality of transmitter groups includes a plurality of transmitters. The transmitters are configured to emit light, the receiver is configured to receive light emitted by the transmitters. the base substrate is configured to produces a deformation upon receiving the touch operation, the light received by the receiver corresponds to the deformation.

Abstract: A display device includes: a display panel and a photonic crystal grating disposed on a light-emitting side of the display panel; wherein the photonic crystal grating has a fully light-transmitting state and a grating state used for 3D display.

Abstract: A touch panel, a display device and a touch detection method are provided. The touch panel includes a base substrate, a plurality of transmitter groups and a receiver. The base substrate has a touch surface configured to receive a touch operation, each of the plurality of transmitter groups includes a plurality of transmitters. The transmitters are configured to emit light, the receiver is configured to receive light emitted by the transmitters. the base substrate is configured to produces a deformation upon receiving the touch operation, the light received by the receiver corresponds to the deformation.

Abstract: An array substrate, a display panel, a display device, an operating method, and a manufacturing method are disclosed. The array substrate includes a wiring structure formed on a base substrate, and the wiring structure includes a common electrode line for connecting a common electrode, and a plurality of signal lines. The plurality of signal lines include at least one pair of signal lines, and the pair of signal lines include a first signal line and a second signal line. The first signal line is disposed on a first side of the common electrode line and is configured to transmit a driving signal for a gate driving circuit. The second signal line is disposed on a second side of the common electrode line and is configured to transmit an inverted signal of the driving signal.