Abstract: A display substrate includes a base substrate, the base substrate including a display region, and the display region including a plurality of pixel regions; and at least four conductive layers arranged in a stacked manner, located on the base substrate, wherein any two adjacent conductive layers are arranged in an insulated manner, each of the conductive layers includes conductive patterns located in the pixel regions, the conductive patterns of any two adjacent conductive layers in the same pixel region form a storage capacitor (e.g., Cst1, Cst2 and Cst3), and in a direction perpendicular to the base substrate, projections of the at least four conductive layers on the base substrate overlap. A manufacturing method of a display substrate and a display device are further provided.

Abstract: The present disclosure relates to a display panel, and a display device including the same. The display panel includes a display area, including M scan lines and N data lines that are intersected, and a plurality of sub-pixels located in a sub-pixel area defined by respective scan lines and data lines, a first test area, comprising N first switching elements having a first end connected to a test signal end, and a control end connected to a first control signal, and N auxiliary switching elements having a first end connected to the nth data line, a second end connected to a second end of the nth first switching element, and the control end connected to a second control signal line; wherein, M and N are positive integers, and n?N.

Abstract: The present disclosure provides an array substrate and a display device. The array substrate includes a plurality of thin film transistors, each of the plurality of thin film transistors including a gate layer, a source/drain layer and a gate insulating layer. The source/drain layer is provided above the gate layer, and the gate insulating layer is provided between the gate layer and the source/drain layer. A via hole platform in the gate insulating layer and above the gate layer of one of the plurality of thin film transistors is arranged to at least partially overlap a via hole platform in the source/drain layer of another of the plurality of thin film transistors.

Abstract: The present disclosure provides an array substrate, a display panel and a display device. The array substrate includes a base substrate and a thin film transistor. An orthographic projection of a drain of the thin film transistor on the base substrate does not go beyond an orthographic projection of a gate of the thin film transistor on the base substrate.

Abstract: The present disclosure provides an array substrate, a display panel and a display device. The array substrate includes a base substrate and a thin film transistor. An orthographic projection of a drain of the thin film transistor on the base substrate does not go beyond an orthographic projection of a gate of the thin film transistor on the base substrate.