Abstract: Provided are a differential signal skew calibration circuit and a semiconductor memory. The differential signal skew calibration circuit may acquire a phase relationship of a differential signals through a phase detection circuit. A phase adjustment control circuit may generate a phase calibration control instruction according to the phase relationship of the differential signals to control a phase calibration circuit to calibrate a phase skew of the input differential signals.

Abstract: Provided are a differential signal skew calibration circuit and a semiconductor memory. The differential signal skew calibration circuit may acquire a phase relationship of a differential signals through a phase detection circuit. A phase adjustment control circuit may generate a phase calibration control instruction according to the phase relationship of the differential signals to control a phase calibration circuit to calibrate a phase skew of the input differential signals.

Abstract: Embodiments of the present disclosure provide a signal verification system, including: a memory controller, a memory, and a first transmission path and a second transmission path connected between the memory controller and the memory, where the memory controller sends one or more to-be-check signals through the first transmission path, and sends a check signal through the second transmission path, where the second transmission path is a single-port channel, and the check signal is a multi-bit signal; and a comparison module, connected to an output end of a first conversion component and an output end of the second transmission path, and configured to obtain and compare an output signal of the first conversion component and an output signal of the second transmission path.