Abstract: The comparator input stage uses low voltage transistors 20 and 21 as the input pair. They have a small threshold voltage, and hence support a low common mode. The circuit includes a current sink 22 coupled to the input pair 20 and 21; a first resistor 33 coupled between a first branch of the input pair and a voltage node V24; a second resistor 36 coupled between a second branch of the input pair and the voltage node V24; a first transistor 23 coupled to the voltage node V24; a second transistor 24 having a gate coupled to a gate of the third transistor 23; a third resistor 32 coupled to a first end of the second transistor 24; and a current source 29 coupled to a second end of the second transistor 24 for controlling a voltage across the third resistor 32 wherein the voltage across the third resistor 32 sets a voltage at the voltage node V24. This voltage at the voltage node V24 serves as an open loop regulation for protection of the input pair transistors 20 and 21.

Abstract: The comparator input stage uses low voltage transistors 20 and 21 as the input pair. They have a small threshold voltage, and hence support a low common mode. The circuit includes a current sink 22 coupled to the input pair 20 and 21; a first resistor 33 coupled between a first branch of the input pair and a voltage node V24; a second resistor 36 coupled between a second branch of the input pair and the voltage node V24; a first transistor 23 coupled to the voltage node V24; a second transistor 24 having a gate coupled to a gate of the third transistor 23; a third resistor 32 coupled to a first end of the second transistor 24; and a current source 29 coupled to a second end of the second transistor 24 for controlling a voltage across the third resistor 32 wherein the voltage across the third resistor 32 sets a voltage at the voltage node V24. This voltage at the voltage node V24 serves as an open loop regulation for protection of the input pair transistors 20 and 21.