Abstract: The present disclosure relates to an integrated circuit output driver, e.g. operating in class-D, for driving an audio transducer. The integrated circuit output driver comprises a first half-bridge driver comprising a first PMOS transistor and a first NMOS transistor connected in series between positive and negative supply voltage rails. A first body terminal is connected to a body of the first PMOS transistor for receipt of a first back bias voltage and a second body terminal connected to a body of the first NMOS transistor for receipt of a second back bias voltage. The integrated circuit output driver comprises a bias voltage generator configured to adjust at least one of the first back bias voltage and the second back bias voltage to control on-resistance of the first PMOS transistor and/or the first NMOS transistor. The integrated circuit output driver is well-suited for hearing aids, headsets and other audio devices.

Abstract: An integrated circuit includes a first logic circuit region comprising a first regional clock network for supplying a first regional clock signal to digital logic circuit(s); and a clock gating circuit to derive the first regional clock signal from a clock signal and selectively apply and interrupt the first regional clock signal in accordance with a state select signal. The first logic circuit region comprises a first back bias voltage grid connected to respective bodies of PMOS transistors of the digital logic circuit(s) and a second back bias voltage grid connected to respective bodies of NMOS transistors of the digital logic circuit(s). The integrated circuit further comprises a controllable back bias voltage generator configured to adjust a first back bias voltage of the first back bias voltage grid, and to adjust a back bias voltage of the second back bias voltage grid, in accordance with the state select signal.

Abstract: The present disclosure relates to an integrated circuit output driver, e.g. operating in class-D, for driving an audio transducer. The integrated circuit output driver comprises a first half-bridge driver comprising a first PMOS transistor and a first NMOS transistor connected in series between positive and negative supply voltage rails. A first body terminal is connected to a body of the first PMOS transistor for receipt of a first back bias voltage and a second body terminal connected to a body of the first NMOS transistor for receipt of a second back bias voltage. The integrated circuit output driver comprises a bias voltage generator configured to adjust at least one of the first back bias voltage and the second back bias voltage to control on-resistance of the first PMOS transistor and/or the first NMOS transistor. The integrated circuit output driver is well-suited for hearing aids, headsets and other audio devices.

Abstract: An integrated circuit includes a first logic circuit region comprising a first regional clock network for supplying a first regional clock signal to digital logic circuit(s); and a clock gating circuit to derive the first regional clock signal from a clock signal and selectively apply and interrupt the first regional clock signal in accordance with a state select signal. The first logic circuit region comprises a first back bias voltage grid connected to respective bodies of PMOS transistors of the digital logic circuit(s) and a second back bias voltage grid connected to respective bodies of NMOS transistors of the digital logic circuit(s). The integrated circuit further comprises a controllable back bias voltage generator configured to adjust a first back bias voltage of the first back bias voltage grid, and to adjust a back bias voltage of the second back bias voltage grid, in accordance with the state select signal.