Abstract: A concrete surface processing machine (100) for processing a concrete surface, wherein the machine comprises means for self-locomotion and a control unit (110) arranged to control the means for self-locomotion, wherein the machine comprises one or more surface quality sensors connected to the control unit (110) and arranged to determine a local surface quality of the concrete surface, and wherein the control unit (110) is arranged to control a self-locomotion of the machine to determine a plurality of local surface quality values associated with respective different locations on the concrete surface.

Abstract: An abrasive tool for a floor grinder, wherein the tool extends along a wear direction (D) from a grinding surface (G) to a mounting surface (M), wherein the abrasive tool comprises at least two sections (410, 420, 430) separated by a surface (P) transversal to the wear direction (D), where the at least two sections comprise respective abrasive materials associated with different grit sizes, where the section located closer to the grinding surface (G) is associated with a larger grit size compared to the section located closer to the mounting surface (M).

Abstract: In a method for operating a passive matrix-addressable ferroelectric or electret memory device, a voltage pulse protocol based on a 1/3 voltage selection rule is used in order to keep disturb voltages at minimum, the voltage pulse protocol comprising cycles for read and write/erase bases on time sequence of voltage pulses with defined parameters. The method comprises a refresh procedure wherein cells for refresh are selected and refresh requests processed by a memory device controller, the refresh requests are monitored and processed in regard of ongoing or scheduled memory operations, and refresh voltage pulses with defined parameters are applied to the memory cells selected for refresh, while simultaneously ensuring that non-selected memory cells are subjected to zero voltage or voltages which do not affect the polarization state of these cells.

Abstract: In a method for operating a passive matrix-addressable ferroelectric or electret memory device, a voltage pulse protocol based on a 1/3 voltage selection rule is used in order to keep disturb voltages at minimum, the voltage pulse protocol comprising cycles for read and write/erase bases on time sequence of voltage pulses with defined parameters. The method comprises a refresh procedure wherein cells for refresh are selected and refresh requests processed by a memory device controller, the refresh requests are monitored and processed in regard of ongoing or scheduled memory operations, and refresh voltage pulses with defined parameters are applied to the memory cells selected for refresh, while simultaneously ensuring that non-selected memory cells are subjected to zero voltage or voltages which do not affect the polarization state of these cells.

Abstract: A matrix-addressable ferroelectric or electret memory device and a method of operating are explained. The method includes applying a first plurality of voltage difference across a first and a second set of electrodes in the memory when data are read, and applying a second plurality of voltage differences when data are refreshed or rewritten. The first and second plurality of voltage differences correspond to sets of potential levels comprising time sequences of voltage pulses. At least one parameter indicative of a change in a memory cell response is used for determining at least one correction factor for the voltage pulses, whereby the pulse parameter is adjusted accordingly. The memory device comprises means for determining the at least one parameter, a calibration memory connected with means for determining the correction factor, and control circuits for adjusting pulse parameters as applied to read and write operations in the memory device.

Abstract: A matrix-addressable ferroelectric or electret memory device and a method of operating are explained. The method includes applying a first plurality of voltage difference across a first and a second set of electrodes in the memory when data are read, and applying a second plurality of voltage differences when data are refreshed or rewritten. The first and second plurality of voltage differences correspond to sets of potential levels comprising time sequences of voltage pulses. At least one parameter indicative of a change in a memory cell response is used for determining at least one correction factor for the voltage pulses, whereby the pulse parameter is adjusted accordingly. The memory device comprises means for determining the at least one parameter, a calibration memory connected with means for determining the correction factor, and control circuits for adjusting pulse parameters as applied to read and write operations in the memory device.