Patents by Inventor Pere ROCA

Pere ROCA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11574807
    Abstract: The invention relates to a process for the preparation of a semiconductor material comprising at least one entirely monocrystalline semiconductor layer, said process comprising the steps of preparation of the surface of a first substrate to receive a monocrystalline silicon layer; deposition by Plasma-Enhanced Chemical Vapor Deposition (PECVD) of a layer of monocrystalline silicon by epitaxial growth with a growth rate gradient on the silicon layer monocrystalline obtained in step (i); and epitaxial growth of a monocrystalline layer of a semiconductor material on the monocrystalline silicon layer obtained in step (ii), to thus obtain a material comprising at least one entirely monocrystalline semiconductor layer. The invention also relates to a multilayer material comprising a monocrystalline layer of semiconductor material.
    Type: Grant
    Filed: November 15, 2018
    Date of Patent: February 7, 2023
    Assignees: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE, INSTITUT PHOTOVOLTAÏQUE D'ILE DE FRANCE (IPVF), ECOLE POLYTECHNIQUE, TOTALENERGIES SE, ELECTRICITE DE FRANCE
    Inventors: Père Roca I Cabaroccas, Wanghua Chen, Romain Cariou
  • Patent number: 11352136
    Abstract: A payload module of a stratospheric drone including a casing (10), and payload equipment contained in the casing (10), wherein the casing includes a support structure (12) and a cover (15), the support structure being suitable for attachment to the drone at the front end thereof, relative to the direction of movement of the drone, and for extending forward from said front end, and in that the cover (15) and the payload equipment are supported by the support structure (12).
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: June 7, 2022
    Assignee: Airbus Defence and Space SAS
    Inventors: Pierre-Luc Georgy, Pere Roca
  • Patent number: 11079568
    Abstract: A payload module (1) of a stratospheric drone including: a casing (10), and a piece of optical equipment (20) comprising an optical axis, mounted in the casing, wherein the module being includes a mirror (40) positioned on the optical axis facing the optical equipment, the mirror being swivelable about at least one axis, within an angular range, wherein the casing has a through-opening (11) shaped so that any light ray received or emitted by the optical equipment parallel to the optical axis and reflected by the mirror passes through the through-opening, over the entire angular range of the mirror.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: August 3, 2021
    Assignee: Airbus Defence and Space SAS
    Inventors: Pierre-Luc Georgy, Pere Roca
  • Publication number: 20200393643
    Abstract: A payload module (1) of a stratospheric drone including: a casing (10), and a piece of optical equipment (20) comprising an optical axis, mounted in the casing, wherein the module being includes a mirror (40) positioned on the optical axis facing the optical equipment, the mirror being swivelable about at least one axis, within an angular range, wherein the casing has a through-opening (11) shaped so that any light ray received or emitted by the optical equipment parallel to the optical axis and reflected by the mirror passes through the through-opening, over the entire angular range of the mirror.
    Type: Application
    Filed: November 20, 2018
    Publication date: December 17, 2020
    Inventors: Pierre-Luc GEORGY, Pere ROCA
  • Publication number: 20200395212
    Abstract: The invention relates to a process for the preparation of a semiconductor material comprising at least one entirely monocrystalline semiconductor layer, said process comprising the steps of preparation of the surface of a first substrate to receive a monocrystalline silicon layer; deposition by Plasma-Enhanced Chemical Vapor Deposition (PECVD) of a layer of monocrystalline silicon by epitaxial growth with a growth rate gradient on the silicon layer monocrystalline obtained in step (i); and epitaxial growth of a monocrystalline layer of a semiconductor material on the monocrystalline silicon layer obtained in step (ii), to thus obtain a material comprising at least one entirely monocrystalline semiconductor layer. The invention also relates to a multilayer material comprising a monocrystalline layer of semiconductor material.
    Type: Application
    Filed: November 15, 2018
    Publication date: December 17, 2020
    Applicants: Centre national de la recherche scientifique, INSTITUT PHOTOVOLTAÏQUE D'lLE DE FRANCE (IPVF), ECOLE POLYTECHNIQUE, L'AIR LIQUIDE, SOCIETE ANONYME POUR L'ETUDE ET L'EXPLOITATION DES PROCEDES GEORGES CLAUDE, TOTAL SA, ELECTRICITE DE FRANCE
    Inventors: Père ROCA I CABAROCCAS, Wanghua CHEN, Romain CARIOU
  • Publication number: 20200283149
    Abstract: A payload module of a stratospheric drone including a casing (10), and payload equipment contained in the casing (10), wherein the casing includes a support structure (12) and a cover (15), the support structure being suitable for attachment to the drone at the front end thereof, relative to the direction of movement of the drone, and for extending forward from said front end, and in that the cover (15) and the payload equipment are supported by the support structure (12).
    Type: Application
    Filed: November 20, 2018
    Publication date: September 10, 2020
    Inventors: Pierre-Luc GEORGY, Pere ROCA
  • Patent number: 10763381
    Abstract: Disclosed is an opto-electronic device including a semiconducting substrate, a layered interface including at least one layer, the layered interface having a first surface in contact with a surface of the semiconducting substrate and the layered interface being adapted for passivating the surface of the semiconducting substrate, the layered interface having a second surface and the layered interface being adapted for electrically insulating the first surface from the second surface, and a textured surface structure including a plurality of nanowires and a transparent dielectric coating, the textured surface structure being in contact with the second surface of the layered interface, the plurality of nanowires protruding from the second surface and the plurality of nanowires being embedded between the second surface and the transparent dielectric coating.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: September 1, 2020
    Assignees: TOTAL S.A., ECOLE POLYTECHNIQUE, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE
    Inventors: Pere Roca I Cabarrocas, Wanghua Chen, Martin Foldyna, Gilles Poulain
  • Publication number: 20180254170
    Abstract: Disclosed is a plasma generating apparatus, for manufacturing devices having patterned layers, including a first electrode assembly and a second electrode assembly placed in a plasma reactor chamber, an electrical power supply for generating a voltage difference between the first electrode assembly and the second electrode assembly. The first electrode assembly includes a plurality of protrusions and a plurality of recesses, the protrusions and recesses being dimensioned and set at respective distances from the surface of the substrate so as to generate a plurality of spatially isolated plasma zones located selectively either between the second electrode assembly and the plurality of recesses or between the second electrode assembly and the plurality of protrusions.
    Type: Application
    Filed: August 30, 2016
    Publication date: September 6, 2018
    Inventors: Erik JOHNSON, Bastien BRUNEAU, Pere ROCA I CABARROCAS, Pavel BULKIN, Nada HABKA
  • Patent number: 10002978
    Abstract: A photovoltaic module includes at least two photovoltaic cells in series, each rectangular cell including, respectively, a first rear thin film electrode, a photovoltaic stack having at least two active materials included between the rear electrode and a transparent conductive electrode made of a thin film, the electrode TC being capable of collecting and transmitting an electric current generated by the photovoltaic stack, the two photovoltaic cells being electrically connected in series by an electrical contact strip that is included between the electrode TC of the first cell and the rear electrode of the second cell. The local thickness of the electrode TC of the cell varies as a function of the distance to the electrical contact strip. Also described are methods for depositing and etching the transparent conductive film so as to simultaneously manufacture a plurality of cells for a single module.
    Type: Grant
    Filed: December 3, 2009
    Date of Patent: June 19, 2018
    Assignees: ECOLE POLYTECHNIQUE, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIC, TOTAL S.A.
    Inventors: Erik V. Johnson, Pere Roca I Cabarrocas
  • Patent number: 9911892
    Abstract: A method for the low-temperature production of radial electronic junction semiconductor nanostructures on a substrate, includes: a) forming on the substrate, metal aggregates capable of electronically doping a first semiconductor material; b) growing, in the vapor phase, doped semiconductor nanowires in the presence of one or more non-dopant precursor gases of the first semiconductor material, the substrate being heated to a temperature at which the metal aggregates are in the liquid phase, the growth of the doped semiconductor nanowires in the vapor phase being catalyzed by the metal aggregates; c) rendering the residual metal aggregates inactive; and d) the chemical vapor deposition, in the presence of one or more precursor gases and a dopant gas, of at least one thin film of a second semiconductor material so as to form at least one radial electronic junction nanostructure between the nanowire and the at least one doped thin film.
    Type: Grant
    Filed: January 3, 2013
    Date of Patent: March 6, 2018
    Assignees: TOTAL S.A., CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE, ECOLE POLYTECHNIQUE
    Inventors: Linwei Yu, Pere Roca I Cabarrocas
  • Publication number: 20180006164
    Abstract: Disclosed is an opto-electronic device including a semiconducting substrate, a layered interface including at least one layer, the layered interface having a first surface in contact with a surface of the semiconducting substrate and the layered interface being adapted for passivating the surface of the semiconducting substrate, the layered interface having a second surface and the layered interface being adapted for electrically insulating the first surface from the second surface, and a textured surface structure including a plurality of nanowires and a transparent dielectric coating, the textured surface structure being in contact with the second surface of the layered interface, the plurality of nanowires protruding from the second surface and the plurality of nanowires being embedded between the second surface and the transparent dielectric coating.
    Type: Application
    Filed: December 21, 2015
    Publication date: January 4, 2018
    Inventors: Pere ROCA I CABARROCAS, Wanghua CHEN, Martin FOLDYNA, Gilles POULAIN
  • Patent number: 9309592
    Abstract: A crystallographically textured metallic substrate includes surfaces for connection and for receiving a thin layer deposit, and is made up of an alloy presenting a cubic crystalline system with centered faces and a predominantly cubic crystallographic texture {100}<001>, the receiving surface including grains mainly presenting crystallographic planes {100} parallel to the receiving surface. The alloy is iron-nickel with weight % relative to total weight: Ni?30%, Cu?15%, Cr?15%, Co?12%, Mn?5%, S<0.0007%, P<0.003%, B<0.0005%, Pb<0.0001%, and in the alloy: 34%?(Ni+Cr+Cu/2+Co/2+Mn). The alloy includes up to 1% in weight of one or several deoxidizing elements chosen among silicon, magnesium, aluminium and calcium, the rest of the elements in the alloy being iron and impurities.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: April 12, 2016
    Assignees: ARCELORMITTAL-STAINLESS AND NICKEL ALLOYS, ECOLE POLYTECHNIQUE
    Inventors: Jean-Pierre Reyal, Pierre-Louis Reydet, Pere Roca Cabarrocas, Yassine Djeridane
  • Publication number: 20150000730
    Abstract: A method for the low-temperature production of radial electronic junction semiconductor nanostructures on a substrate, includes: a) forming on the substrate, metal aggregates capable of electronically doping a first semiconductor material; b) growing, in the vapor phase, doped semiconductor nanowires in the presence of one or more non-dopant precursor gases of the first semiconductor material, the substrate being heated to a temperature at which the metal aggregates are in the liquid phase, the growth of the doped semiconductor nanowires in the vapor phase being catalyzed by the metal aggregates; c) rendering the residual metal aggregates inactive; and d) the chemical vapor deposition, in the presence of one or more precursor gases and a dopant gas, of at least one thin film of a second semiconductor material so as to form at least one radial electronic junction nanostructure between the nanowire and the at least one doped thin film.
    Type: Application
    Filed: January 3, 2013
    Publication date: January 1, 2015
    Applicants: TOTAL MARKETING SERVICES, ECOLE POLYTECHNIQUE, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE
    Inventors: Linwei Yu, Pere Roca I Cabarrocas
  • Publication number: 20140338744
    Abstract: The invention relates to a process for texturing the surface of a silicon substrate, comprising a step of exposing said surface to an MDECR plasma generated, at least from argon, using between 1.5 W/cm2 and 6.5 W/cm2 of plasma power in a matrix distributed electron cyclotron resonance plasma source, the substrate bias being between 100 V and 300 V.
    Type: Application
    Filed: December 20, 2012
    Publication date: November 20, 2014
    Inventors: Nada Habka, Pavel Bulkin, Pere Roca i Cabarrocas
  • Patent number: 8859929
    Abstract: An apparatus is described for depositing a film on a substrate from a plasma. The apparatus comprises an enclosure, a plurality of plasma generator elements disposed within the enclosure, and means, also within the enclosure, for supporting the substrate. Each plasma generator element comprises a microwave antenna having an end from which microwaves are emitted, a magnet disposed in the region of the said antenna end and defining therewith an electron cyclotron resonance region in which a plasma can be generated, and a gas entry element having an outlet for a film precursor gas or a plasma gas. The outlet is arranged to direct gas towards a film deposition area situated beyond the magnet, as considered from the microwave antenna, the outlet being located in, or above, the hot electron confinement envelope.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: October 14, 2014
    Assignees: Dow Corning Corporation, Ecole Polytechnique
    Inventors: Pere Roca I Cabarrocas, Pavel Bulkin, Dmitri Daineka, Patrick Leempoel, Pierre Descamps, Thibault Kervyn De Meerendre
  • Patent number: 8652944
    Abstract: Fabricating semiconductor nanowires (5) on a substrate (1) having a metallic oxide layer (2), includes: a) exposing the metallic oxide layer to a hydrogen plasma (11) of power P for a duration t suitable for reducing the layer and for forming metallic nanodrops (3) of radius (Rm) on the surface of the metallic oxide layer; b) low temperature plasma-assisted deposition of a thin layer (4) of a semiconductor material on the metallic oxide layer including the metallic nanodrops, the thin layer having a thickness (Ha) suitable for covering the metallic nanodrops; and c) thermal annealing at a temperature T sufficient to activate lateral growth of nanowires by catalysis of the material deposited as a thin layer from the metallic nanodrops. Nanowires are obtained by this method and nanometric transistors including a semiconductor nanowire.
    Type: Grant
    Filed: October 9, 2009
    Date of Patent: February 18, 2014
    Assignees: Ecole Polytechnique, Centre National de la Recherche Scientifique
    Inventors: Pere Roca I Cabarrocas, Linwei Yu
  • Patent number: 8635972
    Abstract: A plasma excitation device is described for use in depositing a film on a substrate from a plasma formed by distributed electron cyclotron resonance. The device comprises a microwave antenna having an end from which microwaves are emitted, a magnet disposed in the region of the said antenna end and defining therewith an electron cyclotron resonance region in which a plasma can be generated, and a gas entry element having an outlet for a film precursor gas or a plasma gas. The outlet is arranged to direct gas towards a film deposition area situated beyond the magnet, as considered from the microwave antenna.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: January 28, 2014
    Assignees: Ecole Polytechnique, Dow Corning Corporation
    Inventors: Pere Roca I Cabarrocas, Pavel Bulkin, Dmitri Daineka, Patrick Leempoel, Pierre Descamps, Thibault Kervyn De Meerendre
  • Patent number: 8592949
    Abstract: The invention relates to a method for texturing the surface of a gaseous phase silicon substrate, and to a textured silicon substrate for a solar cell. The method includes at least a step a) of exposing the surface to an SF6/O2 radiofrequency plasma for a duration of 2 to 30 minutes in order to produce a silicon substrate having a textured surface having pyramidal structures, the SF6/O2 ratio being 2 to 10. During step a) the power density generated using the radiofrequency plasma is greater than or equal to 2500 mW/cm2, and the SF6/O2 pressure in the reaction chamber is lower than or equal to 100 mTorrs, so as to produce a silicon substrate having a textured surface having inverted pyramidal structures.
    Type: Grant
    Filed: August 23, 2010
    Date of Patent: November 26, 2013
    Assignees: Ecole Polytechnique, Centre National de la Recherche Scientifique
    Inventors: Pere Roca I Cabarrocas, Mario Moreno, Dimitri Daineka
  • Patent number: 8470690
    Abstract: Method of fabricating a multilayer film having at least one ultrathin layer of crystalline silicon, the film being fabricated from a substrate having a crystalline structure and including a previously-cleaned surface. The method includes the steps of: a) exposing the cleaned surface to a radiofrequency plasma generated in a gaseous mixture of SiF4, hydrogen, and argon, so as to form an ultrathin layer of crystalline silicon having an interface sublayer in contact with the substrate and containing microcavities; b) depositing at least one layer of material on the ultrathin layer of crystalline silicon so as form a multilayer film, the multilayer film including at least one mechanically strong layer; and c) annealing the substrate covered in the multilayer film at a temperature higher than 400° C., thereby enabling the multilayer film to be separated from the substrate.
    Type: Grant
    Filed: October 15, 2010
    Date of Patent: June 25, 2013
    Assignees: Centre National de la Recherche Scientifique, Ecole Polytechnique
    Inventors: Pere Roca I Cabarrocas, Mario Moreno
  • Patent number: 8461027
    Abstract: A method for producing nanostructures on a metal oxide substrate includes the following steps: a) forming metal aggregates on the metal oxide substrate; and b) vapor phase growing nanostructures on the metal oxide substrate covered with metal aggregates, the substrate being heated in the presence of one or more precursor gases, and the vapor phase growth of nanostructures being catalyzed by the metal aggregates. The metal aggregate formation stage a) includes an operation for reducing the surface of the metal oxide substrate by reductive plasma treatment, causing droplets of metal aggregates to form on the substrate, the metal aggregate formation stage a) and the nanostructure growth stage b) being carried out in series in a single shared plasma reactor chamber, the nanostructure growth being directly carried out on the droplets of metal aggregates.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: June 11, 2013
    Assignees: Ecole Polytechnique, Centre National de la Recherche Scientifique, Commissariat a l'Energie Atomique—CEA
    Inventors: Pierre-Jean Alet, Pere Roca I Cabaroccas