Patents by Inventor Perey Wadia

Perey Wadia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070061549
    Abstract: A method and an apparatus to track address translation in I/O virtualization have been presented. In one embodiment, the method includes initiating a page walk if none of a plurality of entries in a translation lookaside buffer (TLB) in a direct memory access (DMA) remap engine matches a guest physical address of an incoming address translation request. The method further includes performing the page walk in parallel with one or more ongoing page walks and tracking progress of the page walk using one or more of a plurality of flags and state information pertaining to intermediate states of the page walk stored in the TLB. Other embodiments have been claimed and described.
    Type: Application
    Filed: September 15, 2005
    Publication date: March 15, 2007
    Inventors: Narayanan Kaniyur, Perey Wadia, Debendra Sharma, Ronald Dammann