Patents by Inventor Pero Subasic

Pero Subasic has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7003749
    Abstract: In a method of determining the existence of one or more conflicts in the placement or configuration of circuit objects defining a circuit, a number of constraints is defined, each of which imposes at least one limitation on at least one circuit object. A number of constraint families is then defined, each of which includes a subset of interrelated constraints. For each of a subset of the constraint families, a determination is made if a conflict exists between the constraints thereof. If not, pairs of constraint families are defined from the plurality constraint families. For each of a subset of the pairs of constraint families, a determination is made if a conflict exists between the constraints thereof. If not, the circuit objects defining the circuit are laid out subject to the constraints.
    Type: Grant
    Filed: January 12, 2004
    Date of Patent: February 21, 2006
    Assignee: Cadence Design Systems, Inc.
    Inventors: Pero Subasic, George Bogdan Arsintescu
  • Patent number: 7003745
    Abstract: Each circuit simulation performed on unique layout of circuit devices generates a design point (DP) that includes device variable values and performance goal values. Circuit models for at least one performance goal are determined as a function of a first subset of the DPs. A performance goal value is determined for each circuit model based on the device variable values obtained from a second subset of the DPs. Errors are determined between the thus determined value of each performance goal and values of the corresponding performance goals obtained from the second subset of the DPs. Input values of device variables are processed with at least one of the circuit models having the smallest error associated therewith to determine therefor a performance goal value. A layout of the circuit devices is generated based on the input device variable values associated with at least one of the thus determined performance goals.
    Type: Grant
    Filed: August 11, 2003
    Date of Patent: February 21, 2006
    Assignee: Cadence Design Systems, Inc.
    Inventors: Pero Subasic, Rodney Phelps
  • Patent number: 6954908
    Abstract: A visualization and data mining technique can be utilized to facilitate analysis of generated sets of design points for an integrated circuit to enable easy and fast understanding of important properties of generated designs. The use of the visualization and data mining technique significantly reduces the time needed for analysis of design space and decision on which design point to choose for implementing into a circuit design.
    Type: Grant
    Filed: December 10, 2002
    Date of Patent: October 11, 2005
    Assignee: Cadence Design Systems, Inc.
    Inventors: Pero Subasic, Rodney Phelps
  • Publication number: 20050155006
    Abstract: In a method of determining the existence of one or more conflicts in the placement or configuration of circuit objects defining a circuit, a number of constraints is defined, each of which imposes at least one limitation on at least one circuit object. A number of constraint families is then defined, each of which includes a subset of interrelated constraints. For each of a subset of the constraint families, a determination is made if a conflict exists between the constraints thereof. If not, pairs of constraint families are defined from the plurality constraint families. For each of a subset of the pairs of constraint families, a determination is made if a conflict exists between the constraints thereof. If not, the circuit objects defining the circuit are laid out subject to the constraints.
    Type: Application
    Filed: January 12, 2004
    Publication date: July 14, 2005
    Inventors: Pero Subasic, George Arsintescu
  • Publication number: 20040243962
    Abstract: Each circuit simulation performed on unique layout of circuit devices generates a design point (DP) that includes device variable values and performance goal values. Circuit models for at least one performance goal are determined as a function of a first subset of the DPs. A performance goal value is determined for each circuit model based on the device variable values obtained from a second subset of the DPs. Errors are determined between the thus determined value of each performance goal and values of the corresponding performance goals obtained from the second subset of the DPs. Input values of device variables are processed with at least one of the circuit models having the smallest error associated therewith to determine therefor a performance goal value. A layout of the circuit devices is generated based on the input device variable values associated with at least one of the thus determined performance goals.
    Type: Application
    Filed: August 11, 2003
    Publication date: December 2, 2004
    Applicant: Neolinear, Inc.
    Inventors: Pero Subasic, Rodney Phelps
  • Publication number: 20040111679
    Abstract: A visualization and data mining technique can be utilized to facilitate analysis of generated sets of design points for an integrated circuit to enable easy and fast understanding of important properties of generated designs. The use of the visualization and data mining technique significantly reduces the time needed for analysis of design space and decision on which design point to choose for implementing into a circuit design.
    Type: Application
    Filed: December 10, 2002
    Publication date: June 10, 2004
    Applicant: Neolinear, Inc.
    Inventors: Pero Subasic, Rodney Phelps
  • Patent number: 6721734
    Abstract: A technique for analyzing affect in which ambiguity in both emotion and natural language is explicitly represented and processed through fuzzy logic. In particular, textual information is processed to i) isolate a vocabulary of words belonging to an emotion, ii) represent the meaning of each word belonging to that emotion using multiple categories and scalar metrics, iii) compute profiles for text documents based on the categories and scores of their component words, and iv) manipulate the profiles to visualize the texts. The representation vehicle in the system is a set of fuzzy semantic categories (affect categories) followed by their respective centralities (degrees of relatedness between lexicon entries and their various categories) and intensities (representative of the strength of the affect level described by that word) called an affect set. A graphical representation of the affect set can also be used as a tool for decision making.
    Type: Grant
    Filed: April 18, 2000
    Date of Patent: April 13, 2004
    Assignee: Claritech Corporation
    Inventors: Pero Subasic, Alison Huettner