Patents by Inventor Perry Neos

Perry Neos has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9678676
    Abstract: A solid state drive (SSD) includes an SSD control module configured to determine frequencies corresponding to how often data stored in respective logical addresses associated with the SSD is updated and form groups of the logical addresses according to the frequencies, and a memory control module configured to rewrite the data to physical addresses in blocks of an SSD storage region based on the groups.
    Type: Grant
    Filed: May 2, 2012
    Date of Patent: June 13, 2017
    Assignee: Marvell World Trade Ltd.
    Inventors: Lau Nguyen, Perry Neos, Luan Ton-That
  • Patent number: 9639423
    Abstract: A system including first and second memory and a control module. The first memory stores a first lookup table with first metadata that includes a first mapping between logical and physical addresses and is lost due to an unexpected power down event. The second memory stores a second lookup table with second metadata and an event log. The second metadata includes a second mapping between the logical and physical addresses. The event log includes entries indicating updated associations between respective ones of the logical addresses and one of the physical addresses as included in the first metadata prior to the power down event. The control module: prior to the power down event, performs segmented flushes each including updating a segment of the second metadata with a corresponding segment of the first metadata; and walks the event log to recover a full flush cycle of segments of the first metadata.
    Type: Grant
    Filed: November 11, 2014
    Date of Patent: May 2, 2017
    Assignee: MARVELL WORLD TRADE LTD.
    Inventors: Jason Adler, Perry Neos, Luan Ton-That, Gwoyuh Hwu
  • Patent number: 9396105
    Abstract: A storage module includes a first memory with blocks for storing first and second commands transmitted from a host to a storage module. The staging module determines, based on a first timer, whether the first command has been received from the host. If received, the first command is stored in a first block of the first memory. If not received, the first block is left empty. A timing module starts the first timer when the first block is left empty and starts a second timer for the first block when the first command is stored in the first block. A control module: executes the commands to transfer data between the host and a second memory based on storage of the commands; determines whether a second block is empty; if empty, waits for the second timer to expire; and if not empty, resets the first timer.
    Type: Grant
    Filed: March 25, 2013
    Date of Patent: July 19, 2016
    Assignee: Marvell International Ltd.
    Inventors: Jason Adler, Lau Nguyen, Perry Neos
  • Patent number: 9304692
    Abstract: An apparatus and other embodiments associated with solid-state drive command grouping are described. In one embodiment, an apparatus includes a hardware memory configured to store a plurality of commands that are to be executed on a solid-state drive. The apparatus also includes organization logic implemented with at least hardware and configured to arrange at least two commands of the plurality of commands into a command pack based, at least in part, on one or more attributes of the at least two commands.
    Type: Grant
    Filed: September 20, 2013
    Date of Patent: April 5, 2016
    Assignee: MARVELL WORLD TRADE LTD.
    Inventors: Lau Nguyen, Perry Neos, Gwoyuh Hwu
  • Patent number: 9240207
    Abstract: Systems, methods, and devices for selecting modes of operation include, in at least one aspect, a method including: selecting a first mode associated with digital-analog conversion; determining whether a second mode associated with digital-analog conversion is available; if the second mode is available, evaluating one or more switching parameters associated with the second mode; switching from the first mode to the second mode if the one or more evaluated switching parameters satisfy one or more predetermined criteria; analyzing one or more performance parameters after switching from the first mode to the second mode; and setting the second mode as a default mode of operation if the one or more analyzed performance parameters are satisfactory.
    Type: Grant
    Filed: March 24, 2014
    Date of Patent: January 19, 2016
    Assignee: Mavell International Ltd.
    Inventor: Perry Neos
  • Patent number: 9064517
    Abstract: Systems and techniques relating to servo systems include, according to an aspect, a method includes: causing writing of a band of spirals including a first spiral set and a second spiral set onto a storage medium; determining one or more characteristics associated with the band of spirals; identifying one or more spirals of the band of spirals that meet the one or more determined characteristics; and determining an end of the band of spirals based on the one or more identified spirals. The method can further include causing writing of servo information onto the storage medium while track following on the band of spirals; causing terminating of the writing of the servo information upon determining the end of the band of spirals; and causing writing of another band of spirals starting at the end of the previous band of spirals.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: June 23, 2015
    Assignee: Marvell International Ltd.
    Inventors: Perry Neos, Luan Ton-That, Man Cheung
  • Publication number: 20150143174
    Abstract: A system including first and second memories and a control module. The first memory stores a first lookup table (LUT) with first metadata. The first metadata maps logical addresses to physical addresses. The first metadata is lost due to an unexpected power down event. The second memory stores an event log and a second LUT with second metadata. The second metadata maps the logical addresses to the physical addresses. The event log includes entries that indicate updated associations between the logical addresses and the physical addresses. The control module, prior to the unexpected power down event, performs segmented flushes that include updating segments of the second metadata with segments of the first metadata.
    Type: Application
    Filed: November 11, 2014
    Publication date: May 21, 2015
    Inventors: Jason Adler, Perry Neos, Luan Ton-That, Gwoyuh Hwu
  • Patent number: 8892816
    Abstract: In first and second memories, respectively, data cannot and can be overwritten on prewritten locations without first erasing the prewritten locations. A selection module selects memory blocks of first memory, which are partially written with first data, in response to receiving a write command to write second data to the memory blocks. A control module, prior to erasing the first data from the memory blocks, writes the first data in a portion of second memory instead of writing the first data in first memory. A location description module generates a description table indicating whether data in memory locations in the portion of second memory are valid or invalid. A rate of adding data to the portion becomes equal to a rate at which data in memory locations in the portion becomes invalid so that the first data is written in the portion without first merging the first data.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: November 18, 2014
    Assignee: Marvell International Ltd.
    Inventors: Lau Nguyen, Perry Neos
  • Patent number: 8892940
    Abstract: A method includes, in at least one aspect, receiving a command for a group of data units to be transmitted to a host in a first sequence; for each data unit of the group of data units, receiving an identifier of the data unit and a signal indicating that the data unit has been retrieved and processed for errors, wherein the identifiers and the signals are received in accordance with the group of data units being retrieved from one or more memory devices in a second sequence that is different from the first sequence; tracking the group of data units retrieved in the second sequence; determining, by processing circuitry, that the group of data units has been retrieved and processed for errors; and initiating transmission of the group of data units to the host in accordance with the first sequence.
    Type: Grant
    Filed: January 29, 2014
    Date of Patent: November 18, 2014
    Assignee: Marvell World Trade Ltd.
    Inventors: Cheng Kuo Huang, Siu-Hung Frederick Au, Lau Nguyen, Perry Neos
  • Patent number: 8886870
    Abstract: A system includes a first memory configured to store a first lookup table (LUT) with first metadata. A second memory is configured to store a second LUT with second metadata, wherein the first metadata includes a first mapping between logical addresses and physical addresses. The second metadata includes a second mapping between the logical addresses and the physical addresses. A control module is configured to update the first metadata. The control module is configured to update segments of the second metadata based on the first metadata at respective predetermined times. Each of the segments refers to a predetermined number of entries of the second LUT.
    Type: Grant
    Filed: May 18, 2011
    Date of Patent: November 11, 2014
    Assignee: Marvell World Trade Ltd.
    Inventors: Jason Adler, Perry Neos, Luan Ton-That, Gwoyuh Hwu
  • Patent number: 8767340
    Abstract: Methods, systems and computer program products for detecting an end of a reference spiral band are described. A first portion of servo information may be written on a disk using the reference spiral band. By detecting an end of a reference spiral band, a new reference spiral band may be launched. A read/write head of a hard disk drive may subsequently use the new spiral band to write the remaining portion of the servo information, which aids the writing of data tracks on the disk.
    Type: Grant
    Filed: June 12, 2012
    Date of Patent: July 1, 2014
    Assignee: Marvell International Ltd.
    Inventors: Perry Neos, Luan Ton-That, Man Cheung
  • Publication number: 20140149807
    Abstract: A method includes, in at least one aspect, receiving a command for a group of data units to be transmitted to a host in a first sequence; for each data unit of the group of data units, receiving an identifier of the data unit and a signal indicating that the data unit has been retrieved and processed for errors, wherein the identifiers and the signals are received in accordance with the group of data units being retrieved from one or more memory devices in a second sequence that is different from the first sequence; tracking the group of data units retrieved in the second sequence; determining, by processing circuitry, that the group of data units has been retrieved and processed for errors; and directing transmission of the group of data units to the host in accordance with the first sequence.
    Type: Application
    Filed: January 29, 2014
    Publication date: May 29, 2014
    Applicant: Marvell World Trade Ltd.
    Inventors: Cheng Kuo Huang, Siu-Hung Frederick Au, Lau Nguyen, Perry Neos
  • Patent number: 8730772
    Abstract: Systems, methods, and computer-readable mediums for handling of switching errors include, in at least one aspect, a method including: switching between a first mode and a second mode; obtaining a first error value associated with switching from the first mode to the second mode; obtaining a second error value associated with switching from the second mode to the first mode; determining a total error value based on the first error value and the second error value; and determining an adjustment value based on the total error value and a value of an associated resolution gain.
    Type: Grant
    Filed: July 25, 2008
    Date of Patent: May 20, 2014
    Assignee: Marvell International Ltd.
    Inventor: Perry Neos
  • Patent number: 8681450
    Abstract: The present disclosure includes systems and techniques relating to self-servo-writing. In some implementations, a method includes determining a spiral velocity associated with writing a plurality of reference spiral sets; identifying a plurality of launching tracks based on a predetermined ratio and the spiral velocity, where each of the plurality of launching tracks is associated with one of the plurality of reference spiral sets; writing each of the plurality of reference spiral sets starting at its associated launching track; and writing one or more sets of servo wedges using the plurality of reference spiral sets, where the reference spiral sets and the one or more sets of servo wedges are written at the predetermined ratio.
    Type: Grant
    Filed: June 10, 2013
    Date of Patent: March 25, 2014
    Assignee: Marvell International Ltd.
    Inventors: Luan Ton-That, Perry Neos
  • Patent number: 8681449
    Abstract: Methods, systems, and apparatus, including computer program products, are described for calibrating servos, and in some implementations for calibrating spiral servos for use in self servo write processes. In one aspect, a method is provided that includes measuring a slope of a spiral written to a machine readable medium, and adjusting a parameter in accordance with the measured slope to calibrate spacing of servo tracks, with respect to variation between a target slope and the measured slope for the spiral, for writing the servo tracks to the machine readable medium using the spiral as a reference and the adjusted parameter to generate a same radial spacing between servo tracks from spirals with different slopes.
    Type: Grant
    Filed: May 17, 2012
    Date of Patent: March 25, 2014
    Assignee: Marvell International Ltd.
    Inventors: Jason Adler, David Rutherford, Man Cheung, Perry Neos, Luan Ton-That
  • Patent number: 8667217
    Abstract: A selection module selects memory blocks of a flash memory in response to (i) the memory blocks being partially written with first data and (ii) receiving a write command to write second data to the memory blocks. A control module, prior to erasing the first data from the memory blocks, collects the first data and writes the collected data in a portion of a dynamic random access memory instead of writing the collected data in the flash memory. A location description module generates a description table indicating whether data in memory locations in the portion of the dynamic random access memory are valid or invalid. A rate of adding data to the portion becomes equal to a rate at which data in memory locations in the portion becomes invalid so that the collected data is written in the portion without first merging the collected data.
    Type: Grant
    Filed: July 16, 2013
    Date of Patent: March 4, 2014
    Assignee: Marvell International Ltd.
    Inventors: Lau Nguyen, Perry Neos
  • Patent number: 8650438
    Abstract: The present disclosure includes systems and techniques relating to solid state drive controllers. In some implementations, a device includes a buffer that holds a block of data corresponding to a command from a host. The command identifies the block of data and a logical sequence in which the identified block of data is to be transmitted. In response to the command, a data retriever included in the device retrieves the portions of the block of data from non-volatile memory units in a retrieval sequence that is different from the logical sequence. When the device receives multiple commands identifying multiple blocks of data, the device services the commands in parallel by retrieving portions of blocks of data identified by both commands.
    Type: Grant
    Filed: July 23, 2010
    Date of Patent: February 11, 2014
    Assignee: Marvell World Trade Ltd.
    Inventors: Cheng Kuo Huang, Siu-Hung Fred Au, Lau Nguyen, Perry Neos
  • Publication number: 20140025873
    Abstract: An apparatus and other embodiments associated with solid-state drive command grouping are described. In one embodiment, an apparatus includes a hardware memory configured to store a plurality of commands that are to be executed on a solid-state drive. The apparatus also includes organization logic implemented with at least hardware and configured to arrange at least two commands of the plurality of commands into a command pack based, at least in part, on one or more attributes of the at least two commands.
    Type: Application
    Filed: September 20, 2013
    Publication date: January 23, 2014
    Applicant: MARVELL WORLD TRADE LTD.
    Inventors: Lau NGUYEN, Perry NEOS, Gwoyuh HWU
  • Patent number: 8543756
    Abstract: A method and other embodiments associated with solid-state drive command grouping are described. In one embodiment, a first command and a second command are grouped into a command pack, where the first command and the second command do not share a common channel for execution. A solid-state drive is controlled to execute the command pack on the solid-state drive, where executing the command pack causes the first command and the second command to execute concurrently on separate channels.
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: September 24, 2013
    Assignee: Marvell World Trade Ltd.
    Inventors: Lau Nguyen, Perry Neos, Gwoyuh Hwu
  • Patent number: 8489804
    Abstract: A system includes a selection module, a control module, an erasing module, and a read/write module. The selection module is configured to select X of Y memory blocks (i) based on fullness of the X memory blocks and (ii) in response to a write command, where X and Y are integers greater than or equal to 1. The Y memory blocks are located in first memory. The control module is configured to store first data from the X memory blocks in second memory. The erasing module is configured to erase the first data from the X memory blocks. The read/write module is configured to write second data to the X memory blocks based on the write command.
    Type: Grant
    Filed: August 27, 2010
    Date of Patent: July 16, 2013
    Assignee: Marvell International Ltd.
    Inventors: Lau Nguyen, Perry Neos