Abstract: A power source capable of supplying power to operate electronics of a system is disclosed. In one example, the power source takes advantage of an electrical potential difference between primary and secondary grounds. The power source can reduce system cost and power consumption.

Abstract: A power source capable of supplying power to operate electronics of a system is disclosed. In one example, the power source takes advantage of an electrical potential difference between primary and secondary grounds. The power source can reduce system cost and power consumption.

Abstract: A power source capable of supplying power to operate electronics of a system is disclosed. In one example, the power source takes advantage of an electrical potential difference between primary and secondary grounds. The power source can reduce system cost and power consumption.

Abstract: A power source capable of supplying power to operate electronics of a system is disclosed. In one example, the power source takes advantage of an electrical potential difference between primary and secondary grounds. The power source can reduce system cost and power consumption.

Abstract: Methods and apparatuses for clock signal distribution and synchronization are described. A base clock signal (e.g., system clock signal) is provided to multiple components of an electronic system. Two or more of the components include clock generation circuitry to generate component clock signals based on the base clock signal. The component clock signals are distributed to one or more other components within the electronic system. The component clock generation circuitry is allowed to synchronize to the base clock signal during a first predetermined period of time (e.g., system boot up). At the end of the first predetermined period of time, the base clock signal is blocked from the component clock generation circuitry for a second predetermined period of time. At the expiration of the second predetermined period of time, the component clock generation circuitry is allowed to re-synchronize with the base clock signal.

Abstract: A ring latency timer provides a station attached to a token ring network with the capability of obtaining an accurate latency measurement of the ring to which it is attached. An internal hardware register, which may be read via the processor control bus interface, contains the latest ring latency measurement. A latency interrupt bit, when cleared, enables the latency measurement function. A subsequent interrupt which causes the latency interrupt bit to be set by the chip signals the completion of the latency measurement and the function is once again disabled. The latency register holds the latency information until the interrupt bit is cleared by the processor.

Abstract: A system, for counting the occurrence of a plurality of system events and for prioritizing the order in which count values are to be incremented, receives a plurality of data signals (15) where each signal is associated with a system event. The data signals (15) are stored in a storage register (16). A memory device (12) stores a plurality of count values, where one count value is associated with each system event to be counted. Each count value is stored in a preselected memory location. The storage register (16) also receives a feedback signal (32) to update the signals (15) stored in the register (16). The storage register (16) generates a plurality of signals (19) which are input to a priority decoder (14) and the priority decoder (14) generates a priority signal (32) to address the location in the memory device (12) where the count value to be accessed is stored.

Abstract: The present invention provides asynchronous priority select logic for allowinig an individual station on a token ring network to hold a token for asynchronous transmission only for a specified maximum time period. The asynchronous priority select logic comprises a token rotation timer for timing token rotations on the ring from arrival to arrival. A token holding timer limits the amount of ring bandwidth used by the station for asynchronous transmission after the token is captured by the station. Select circuitry responsive to the value of the token rotation timer determines if the captured token is still usable for transmission by determining if the token rotation timer value is less than a preselected asynchronous threshold value. The select logic includes means for generating a selected asynchronous threshold value having a first bit length. The selected asynchronous threshold value is then expanded to a second bit length corresponding to the bit length of the token holding timer value.