Patents by Inventor Pete A. Benson

Pete A. Benson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor component having plate and stacked dice
    Patent number: 7224051
    Abstract: A semiconductor component includes a base die and a secondary die stacked on and bonded to the base die. The base die includes conductive vias which form an internal signal transmission system for the component, and allow the circuit side of the secondary die to be bonded to the back side of the base die. The component also includes an array of terminal contacts on the circuit side of the base die in electrical communication with the conductive vias. The component can also include an encapsulant on the back side of the base die, which substantially encapsulates the secondary die, and a polymer layer on the circuit side of the base die which functions as a protective layer, a rigidifying member and a stencil for forming the terminal contacts. A method for fabricating the component includes the step of bonding singulated secondary dice to base dice on a base wafer, or bonding a secondary wafer to the base wafer, or bonding singulated secondary dice to singulated base dice.
    Type: Grant
    Filed: January 17, 2006
    Date of Patent: May 29, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Warren M. Farnworth, Alan G. Wood, William M. Hiatt, James M. Wark, David R. Hembree, Kyle K. Kirby, Pete A. Benson
  • Method for fabricating semiconductor components with thinned substrate, circuit side contacts, conductive vias and backside contacts
    Publication number: 20060270108
    Abstract: A method for fabricating a semiconductor component includes the steps of providing a substrate having a contact on a circuit side thereof, forming an opening from a backside of the substrate to the contact, forming a conductive via in the opening in electrical contact with a surface of the contact, and forming a second contact on the back side in electrical communication with the conductive via. The method can also include the steps of thinning the substrate from the backside, forming insulating layers on the circuit side and the backside, and forming a conductor and terminal contact on the circuit side in electrical communication with the conductive via. A semiconductor component includes the contact on the circuit side, the conductive via in electrical contact with the contact, and the second contact on the backside in electrical communication with the conductive via. The semiconductor component can also include the insulating layers, the conductor and the terminal contact.
    Type: Application
    Filed: August 2, 2006
    Publication date: November 30, 2006
    Inventors: Warren Farnworth, Alan Wood, William Hiatt, James Wark, David Hembree, Kyle Kirby, Pete Benson
  • Wafer level methods for fabricating multi-dice chip scale semiconductor components
    Patent number: 7060526
    Abstract: A semiconductor component includes a base die and a secondary die stacked on and bonded to the base die. The base die includes conductive vias which form an internal signal transmission system for the component, and allow the circuit side of the secondary die to be bonded to the back side of the base die. The component also includes an array of terminal contacts on the circuit side of the base die in electrical communication with the conductive vias. The component can also include an encapsulant on the back side of the base die, which substantially encapsulates the secondary die, and a polymer layer on the circuit side of the base die which functions as a protective layer, a rigidifying member and a stencil for forming the terminal contacts. A method for fabricating the component includes the step of bonding singulated secondary dice to base dice on a base wafer, or bonding a secondary wafer to the base wafer, or bonding singulated secondary dice to singulated base dice.
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: June 13, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Warren M. Farnworth, Alan G. Wood, William M. Hiatt, James M. Wark, David R. Hembree, Kyle K. Kirby, Pete A. Benson
  • Semiconductor component having plate and stacked dice
    Publication number: 20060113682
    Abstract: A semiconductor component includes a base die and a secondary die stacked on and bonded to the base die. The base die includes conductive vias which form an internal signal transmission system for the component, and allow the circuit side of the secondary die to be bonded to the back side of the base die. The component also includes an array of terminal contacts on the circuit side of the base die in electrical communication with the conductive vias. The component can also include an encapsulant on the back side of the base die, which substantially encapsulates the secondary die, and a polymer layer on the circuit side of the base die which functions as a protective layer, a rigidifying member and a stencil for forming the terminal contacts. A method for fabricating the component includes the step of bonding singulated secondary dice to base dice on a base wafer, or bonding a secondary wafer to the base wafer, or bonding singulated secondary dice to singulated base dice.
    Type: Application
    Filed: January 17, 2006
    Publication date: June 1, 2006
    Inventors: Warren Farnworth, Alan Wood, William Hiatt, James Wark, David Hembree, Kyle Kirby, Pete Benson
  • Multi-dice chip scale semiconductor components
    Patent number: 6998717
    Abstract: A semiconductor component includes a base die and a secondary die stacked on and bonded to the base die. The base die includes conductive vias which form an internal signal transmission system for the component, and allow the circuit side of the secondary die to be bonded to the back side of the base die. The component also includes an array of terminal contacts on the circuit side of the base die in electrical communication with the conductive vias. The component can also include an encapsulant on the back side of the base die, which substantially encapsulates the secondary die, and a polymer layer on the circuit side of the base die which functions as a protective layer, a rigidifying member and a stencil for forming the terminal contacts. A method for fabricating the component includes the step of bonding singulated secondary dice to base dice on a base wafer, or bonding a secondary wafer to the base wafer, or bonding singulated secondary dice to singulated base dice.
    Type: Grant
    Filed: October 11, 2004
    Date of Patent: February 14, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Warren M. Farnworth, Alan G. Wood, William M. Hiatt, James M. Wark, David R. Hembree, Kyle K. Kirby, Pete A. Benson
  • Multi-dice chip scale semiconductor components
    Publication number: 20050046038
    Abstract: A semiconductor component includes a base die and a secondary die stacked on and bonded to the base die. The base die includes conductive vias which form an internal signal transmission system for the component, and allow the circuit side of the secondary die to be bonded to the back side of the base die. The component also includes an array of terminal contacts on the circuit side of the base die in electrical communication with the conductive vias. The component can also include an encapsulant on the back side of the base die, which substantially encapsulates the secondary die, and a polymer layer on the circuit side of the base die which functions as a protective layer, a rigidifying member and a stencil for forming the terminal contacts. A method for fabricating the component includes the step of bonding singulated secondary dice to base dice on a base wafer, or bonding a secondary wafer to the base wafer, or bonding singulated secondary dice to singulated base dice.
    Type: Application
    Filed: October 11, 2004
    Publication date: March 3, 2005
    Inventors: Warren Farnworth, Alan Wood, William Hiatt, James Wark, David Hembree, Kyle Kirby, Pete Benson
  • Multi-dice chip scale semiconductor components and wafer level methods of fabrication
    Patent number: 6841883
    Abstract: A semiconductor component includes a base die and a secondary die stacked on and bonded to the base die. The base die includes conductive vias which form an internal signal transmission system for the component, and allow the circuit side of the secondary die to be bonded to the back side of the base die. The component also includes an array of terminal contacts on the circuit side of the base die in electrical communication with the conductive vias. The component can also include an encapsulant on the back side of the base die, which substantially encapsulates the secondary die, and a polymer layer on the circuit side of the base die which functions as a protective layer, a rigidifying member and a stencil for forming the terminal contacts. A method for fabricating the component includes the step of bonding singulated secondary dice to base dice on a base wafer, or bonding a secondary wafer to the base wafer, or bonding singulated secondary dice to singulated base dice.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: January 11, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Warren M. Farnworth, Alan G. Wood, William M. Hiatt, James M. Wark, David R. Hembree, Kyle K. Kirby, Pete A. Benson
  • MULTI-DICE CHIP SCALE SEMICONDUCTOR COMPONENTS AND WAFER LEVEL METHODS OF FABRICATION
    Publication number: 20040256734
    Abstract: A semiconductor component includes a base die and a secondary die stacked on and bonded to the base die. The base die includes conductive vias which form an internal signal transmission system for the component, and allow the circuit side of the secondary die to be bonded to the back side of the base die. The component also includes an array of terminal contacts on the circuit side of the base die in electrical communication with the conductive vias. The component can also include an encapsulant on the back side of the base die, which substantially encapsulates the secondary die, and a polymer layer on the circuit side of the base die which functions as a protective layer, a rigidifying member and a stencil for forming the terminal contacts. A method for fabricating the component includes the step of bonding singulated secondary dice to base dice on a base wafer, or bonding a secondary wafer to the base wafer, or bonding singulated secondary dice to singulated base dice.
    Type: Application
    Filed: March 31, 2003
    Publication date: December 23, 2004
    Inventors: Warren M. Farnworth, Alan G. Wood, William M. Hiatt, James M. Wark, David R. Hembree, Kyle K. Kirby, Pete A. Benson
  • Wafer level methods for fabricating multi-dice chip scale semiconductor components
    Publication number: 20040188819
    Abstract: A semiconductor component includes a base die and a secondary die stacked on and bonded to the base die. The base die includes conductive vias which form an internal signal transmission system for the component, and allow the circuit side of the secondary die to be bonded to the back side of the base die. The component also includes an array of terminal contacts on the circuit side of the base die in electrical communication with the conductive vias. The component can also include an encapsulant on the back side of the base die, which substantially encapsulates the secondary die, and a polymer layer on the circuit side of the base die which functions as a protective layer, a rigidifying member and a stencil for forming the terminal contacts. A method for fabricating the component includes the step of bonding singulated secondary dice to base dice on a base wafer, or bonding a secondary wafer to the base wafer, or bonding singulated secondary dice to singulated base dice.
    Type: Application
    Filed: December 8, 2003
    Publication date: September 30, 2004
    Inventors: Warren M. Farnworth, Alan G. Wood, William M. Hiatt, James M. Wark, David R. Hembree, Kyle K. Kirby, Pete A. Benson