Abstract: A chip scale package includes a mandrel built flexible circuit having a circuit trace on a first surface and an aperture extending therethrough. The chip scale package includes a pad covering the aperture on the first surface of the flexible circuit and a raised interconnection member extending outwardly from the pad. The chip scale package also includes a chip secured to a second surface of the flexible circuit, such that the chip is electrically connected to the pad.

Abstract: The present invention includes stack flexible circuit layers having raised features or bumps for Z-axis interconnection to another circuit layer or electrical component. An intermediate or adhesive layer separates each circuit layer. The multiple layers are stacked with the raised features from one layer aligning with pads of an overlying or underlying layer and are laminated so that the raised features pierce the intermediate or adhesive layer and make electrical contact with the corresponding pad of the adjacent circuit layer. The raised features may have a shape sufficient to penetrate the intermediate and/or the adhesive layer allowing blind vias to be made without pre-drilling the intermediate or adhesive layers. The intermediate layer of film can have a function other than or in addition to that of an adhesive.