Patents by Inventor Pete Vavaroutsos

Pete Vavaroutsos has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11983365
    Abstract: An electronic device includes a capacitive sense array and is coupled to a stylus including a conductive tip and a conductive wire module. The conductive tip and wire module of the stylus are driven by a tip drive signal and a wire drive signal simultaneously. The tip and wire drive signals have a single stylus drive frequency. While the conductive tip and wire module are driven by the tip and wire drive signals, the electronic device scans the capacitive sense array to obtain a plurality of capacitive sense signals from a plurality of sense electrodes of the capacitive sense array. The electronic device generates a composite image of the capacitive sense array based on the plurality of capacitive sense signals and processes the composite image to determine one or more orientation parameters (e.g., a tilt angle) of the stylus with respect to a surface of the capacitive sense array.
    Type: Grant
    Filed: December 14, 2022
    Date of Patent: May 14, 2024
    Assignee: PARADE TECHNOLOGIES, LTD
    Inventors: Yi Ling, Pete Vavaroutsos, Roel Coppoolse
  • Patent number: 11681380
    Abstract: This application is directed to a capacitive sense array including a two-dimensional array of capacitive sense elements. Each capacitive sense element is formed by a respective intersection of (i) a respective row electrode in a first electrode layer and (ii) a respective column electrode in a second electrode layer. Each column of the capacitive sense elements includes two or more interdigitated column electrodes. Each row electrode forms two or more rows of capacitive sense elements at intersections with the column electrodes.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: June 20, 2023
    Assignee: PARADE TECHNOLOGIES, LTD.
    Inventors: Andrew Kiernan, Frederick Jaccard, Pete Vavaroutsos
  • Publication number: 20190064969
    Abstract: This application is directed to a capacitive sense array including a two-dimensional array of capacitive sense elements. Each capacitive sense element is formed by a respective intersection of (i) a respective row electrode in a first electrode layer and (ii) a respective column electrode in a second electrode layer. Each column of the capacitive sense elements includes two or more interdigitated column electrodes. Each row electrode forms two or more rows of capacitive sense elements at intersections with the column electrodes.
    Type: Application
    Filed: August 30, 2018
    Publication date: February 28, 2019
    Inventors: Andrew Kiernan, Fred Jaccard, Pete Vavaroutsos