Patents by Inventor Peter A. Benson

Peter A. Benson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060003255
    Abstract: Methods for optimizing physical properties of selectively consolidatable materials, such as photoimageable materials, include mixing filler materials with the selectively consolidatable materials. The resulting compound has the desired physical property, as well as selective consolidatability. Examples of physical properties that may optimized in a selectively consolidatable compound by mixing a filler material with a selectively consolidatable material include, without limitation, coefficient of thermal expansion, rigidity, fracture toughness, thermal stability, and strength.
    Type: Application
    Filed: August 31, 2005
    Publication date: January 5, 2006
    Inventors: Alan Wood, Warren Farnworth, David Hembree, Sidney Rigg, William Hiatt, Peter Benson, Kyle Kirby, Salman Akram
  • Publication number: 20060003549
    Abstract: A fabrication substrate for use in fabricating integrated circuits and other electronic devices includes a substrate that comprises semiconductor material, as well as a support structure on an active surface of the substrate. The support structure is located at or adjacent to an entire outer peripheral edge of the substrate. The support structure may be configured as a ring-like element or as a member which substantially covers an active surface of the semiconductor substrate and forms a protective structure over each semiconductor device carried by the active surface.
    Type: Application
    Filed: August 31, 2005
    Publication date: January 5, 2006
    Inventors: Alan Wood, Warren Farnworth, David Hembree, Sidney Rigg, William Hiatt, Peter Benson, Kyle Kirby, Salman Akram
  • Publication number: 20060001139
    Abstract: A support structure for use with a semiconductor substrate in thinning, or backgrinding, thereof, as well as during post-thinning processing of the semiconductor substrate includes a portion which extends substantially along and around an outer periphery of the semiconductor substrate to impart the thinned semiconductor substrate with rigidity. The support structure may be configured as a ring or as a member which substantially covers an active surface of the semiconductor substrate and forms a protective structure over each semiconductor device carried by the active surface.
    Type: Application
    Filed: August 31, 2005
    Publication date: January 5, 2006
    Inventors: Alan Wood, Warren Farnworth, David Hembree, Sidney Rigg, William Hiatt, Peter Benson, Kyle Kirby, Salman Akram
  • Publication number: 20050283585
    Abstract: A heap analyzer that processes a snapshot of the heap contained in a dump file is described. The heap analyzer tool can be configured to relocate the pointers in the dumped heap and allow developers to examine the heap in web browser by presenting markup for displaying a heap object in the browser and rendering pointers in the object as clickable links. When a link is selected, the pointer is followed to another object and markup is generated for rendering that object with its links. Furthermore, callbacks may be provided through an application programming interface (API) to allow developers to furnish their own code for analyzing and displaying their data structures.
    Type: Application
    Filed: June 21, 2004
    Publication date: December 22, 2005
    Inventors: Harlan Sexton, Robert Lee, Peter Benson
  • Publication number: 20050275750
    Abstract: The following disclosure describes several embodiments of (1) methods for wafer-level packaging of microelectronic imagers, (2) methods of forming electrically conductive interconnects in microelectronic imagers, (3) methods for forming optical devices for microelectronic imagers, and (4) microelectronic imagers that have been packaged using wafer-level packaging processes. Wafer-level packaging of microelectronic imagers is expected to significantly enhance the efficiency of manufacturing microelectronic imagers because a plurality of imagers can be packaged simultaneously using highly accurate and efficient processes developed for packaging semiconductor devices. Moreover, wafer-level packaging of microelectronic imagers is expected to enhance the quality and performance of such imagers because the semiconductor fabrication processes can reliably align an optical device with an image sensor and space the optical device apart from the image sensor by a desired distance with a higher degree of precision.
    Type: Application
    Filed: June 9, 2004
    Publication date: December 15, 2005
    Inventors: Salman Akram, Peter Benson, Warren Farnworth, William Hiatt
  • Publication number: 20050275048
    Abstract: Microelectronic imagers and methods for packaging microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging unit can include a microelectronic die, an image sensor, an integrated circuit electrically coupled to the image sensor, and a bond-pad electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the die and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad with conductive fill material at least partially disposed in the passage. An electrically conductive support member is carried by and projects from the bond-pad. A cover over the image sensor is coupled to the support member.
    Type: Application
    Filed: June 14, 2004
    Publication date: December 15, 2005
    Inventors: Warren Farnworth, Sidney Rigg, William Hiatt, Kyle Kirby, Peter Benson, James Wark, Alan Wood, David Hembree, Salman Akram, Charles Watkins
  • Publication number: 20050268053
    Abstract: A method and software for analyzing a heap is described, in which a snapshot is made of a heap, which can be later analyzed by an analysis tool when a program that had run out of memory is no longer running. In one embodiment, an object allocated by the program is accessed and copied into a file, and an address of the object allocated by the process is recorded in association with an offset in the file of the copy of the object. The copy of the object copied into the file has preferably the same size as the object allocated by the process. A heap analysis tool may then be run on the objects copied into the file.
    Type: Application
    Filed: May 28, 2004
    Publication date: December 1, 2005
    Inventors: Harlan Sexton, Robert Lee, Peter Benson
  • Publication number: 20050254133
    Abstract: Microelectronic imagers, optical devices for microelectronic imagers, methods for manufacturing integrated optical devices for use with microelectronic imagers, and methods for packaging microelectronic imagers. The optical devices are manufactured in optical device assemblies that provide efficient and highly accurate fabrication of the optics that are used in microelectronic imagers. The optical device assemblies are particularly useful for packaging a plurality of microelectronic imagers at the wafer level. Wafer-level packaging is expected to significantly enhance the efficiency of manufacturing microelectronic imagers because a plurality of imagers can be packaged simultaneously using highly accurate and efficient processes developed for packaging processors, memory devices and other semiconductor devices.
    Type: Application
    Filed: May 13, 2004
    Publication date: November 17, 2005
    Inventors: Salman Akram, Peter Benson
  • Publication number: 20050250292
    Abstract: Disclosed herein are methods for forming photolithography alignment markers on the back side of a substrate, such as a crystalline silicon substrate used in the manufacture of semiconductor integrated circuits. According to the disclosed techniques, laser radiation is used to remove the material (e.g., silicon) from the back side of a substrate to form the back side alignment markers at specified areas. Such removal can comprise the use of laser ablation or laser-assisted etching. The substrate is placed on a motor-controlled substrate holding mechanism in a laser removal chamber, and the areas are automatically moved underneath the laser radiation to removal the material. The substrate holding mechanism can comprise a standard chuck (in which case use of a protective layer on the front side of the substrate is preferred), or a substrate clamping assembly which suspends the substrate at its edges (in which case the protective layer is not necessary).
    Type: Application
    Filed: May 6, 2004
    Publication date: November 10, 2005
    Inventors: Pary Baluswamy, Peter Benson
  • Publication number: 20050250291
    Abstract: Disclosed herein are methods for removing overlying materials on a substrate which otherwise might optically obscure an underlying photolithography alignment marker. According to the disclosed techniques, laser radiation is used to remove the material (e.g., a metal) in an area which overlies the alignment marker (e.g., formed in polysilicon). Such removal can comprise the use of laser ablation or laser-assisted etching. The substrate is placed on a motor-controlled chuck in a laser removal chamber, and the areas are automatically moved underneath the laser radiation to removal the material. Alternatively, a stencil having holes corresponding to the areas can be placed over the substrate to mitigate the need to move the substrate to the areas with precision.
    Type: Application
    Filed: May 6, 2004
    Publication date: November 10, 2005
    Inventors: Pary Baluswamy, Peter Benson
  • Publication number: 20050245005
    Abstract: An elevated containment structure in the shape of a wafer edge ring surrounding a surface of a semiconductor wafer is disclosed, as well as methods of forming and using such a structure. In one embodiment, a wafer edge ring is formed using a stereolithography (STL) process. In another embodiment, a wafer edge ring is formed with a spin coating apparatus provided with a wafer edge exposure (WEE) system. In further embodiments, a wafer edge ring is used to contain a liquid over a wafer active surface during a processing operation. In one embodiment, the wafer edge ring contains a liquid having a higher refractive index than air while exposing a photoresist on the wafer by immersion lithography. In another embodiment, the wafer edge ring contains a curable liquid material while forming a chip scale package (CSP) sealing layer on the wafer.
    Type: Application
    Filed: April 29, 2004
    Publication date: November 3, 2005
    Inventor: Peter Benson
  • Patent number: 6931423
    Abstract: An approach is provided for maintaining a write barrier during an assignment operation between a source object and a target object. A source tag is obtained from a first reference to the source object, and a target tag is obtained from a second reference to the target object. The source tag and the target tag are compared, such that if the source tag is in a predetermined relationship with the target tag, then a data structure (e.g., a remember table or exit table) associated with the write barrier is updated in accordance with the assignment operation. In one embodiment, the routine to update the data structure is dispatched from a function table based on a tag value in a header associated with the source object.
    Type: Grant
    Filed: January 9, 2003
    Date of Patent: August 16, 2005
    Assignee: Oracle International Corp.
    Inventors: Harlan Sexton, David Unietis, Peter Benson
  • Publication number: 20050116179
    Abstract: A radiation modifying apparatus comprises a plurality of solid state radiation sources to generate radiation that modifies a first material such as by curing or creating alignment through polarization. The solid state radiation sources can be disposed in an array pattern. Optical concentrators, arranged in a corresponding array pattern, receive radiation from corresponding solid state radiation sources. The concentrated radiation is received by a plurality of optical waveguides, also arranged in a corresponding array pattern. Each optical waveguide includes a first end to receive the radiation and a second end to output the radiation. The radiation modifying apparatus can be utilized for continuous substrate, sheet, piece part, spot curing, and/or 3D radiation-cure processes.
    Type: Application
    Filed: June 16, 2004
    Publication date: June 2, 2005
    Inventors: Francis Aguirre, Michele Craton, Jack Lai, David Phillips, Peter Benson, Dave Hofeldt
  • Publication number: 20050116176
    Abstract: A radiation curing apparatus comprises a plurality of solid state radiation sources to generate radiation that cures a first material. The solid state radiation sources can be disposed in an array pattern. Optical concentrators, arranged in a corresponding array pattern, receive radiation from corresponding solid state radiation sources. The concentrated radiation is received by a plurality of optical waveguides, also arranged in a corresponding array pattern. Each optical waveguide includes a first end to receive the radiation and a second end to output the radiation. The curing apparatus can be utilized for continuous substrate, sheet, piece part, spot curing, and/or 3D radiation-cure processes.
    Type: Application
    Filed: December 2, 2003
    Publication date: June 2, 2005
    Inventors: Francis Aguirre, Michele Craton, Jack Lai, David Phillips, Peter Benson, Gordon Henson, Michael Meis
  • Publication number: 20050116178
    Abstract: A radiation modifying apparatus comprises a plurality of solid state radiation sources to generate radiation that modifies a first material such as by curing or creating alignment through polarization. The solid state radiation sources can be disposed in an array pattern. Optical concentrators, arranged in a corresponding array pattern, receive radiation from corresponding solid state radiation sources. The concentrated radiation is received by a plurality of optical waveguides, also arranged in a corresponding array pattern. Each optical waveguide includes a first end to receive the radiation and a second end to output the radiation. The radiation modifying apparatus can be utilized for continuous substrate, sheet, piece part, spot curing, and/or 3D radiation-cure processes.
    Type: Application
    Filed: June 16, 2004
    Publication date: June 2, 2005
    Inventors: Francis Aguirre, Peter Benson, Michele Craton, David Hofeldt, Jack Lai, David Phillips
  • Publication number: 20050116177
    Abstract: A radiation modifying apparatus comprises a plurality of solid state radiation sources to generate radiation that modifies a first material such as by curing or creating alignment through polarization. The solid state radiation sources can be disposed in an array pattern. Optical concentrators, arranged in a corresponding array pattern, receive radiation from corresponding solid state radiation sources. The concentrated radiation is received by a plurality of optical waveguides, also arranged in a corresponding array pattern. Each optical waveguide includes a first end to receive the radiation and a second end to output the radiation. The radiation modifying apparatus can be utilized for continuous substrate, sheet, piece part, spot curing, and/or 3D radiation-cure processes.
    Type: Application
    Filed: June 16, 2004
    Publication date: June 2, 2005
    Inventors: Francis Aguirre, Michele Craton, Jack Lai, David Phillips, Peter Benson
  • Publication number: 20050104171
    Abstract: Microelectronic devices, microfeature workpieces, and methods of forming and stacking the microelectronic devices and the microfeature workpieces. In one embodiment, a microfeature workpiece includes a plurality of first microelectronic dies. The individual first dies have an integrated circuit, a plurality of pads electrically coupled to the integrated circuit, and a plurality of first conductive mating structures at least proximate to corresponding pads. The first conductive mating structures project away from the first dies and are configured to interconnect with corresponding complementary second conductive mating structures on second dies which are to be mounted to corresponding first dies.
    Type: Application
    Filed: November 13, 2003
    Publication date: May 19, 2005
    Inventors: Peter Benson, William Hiatt
  • Publication number: 20050104228
    Abstract: Microelectronic devices, methods for packaging microelectronic devices, and methods for forming vias and conductive interconnects in microfeature workpieces and dies are disclosed herein. In one embodiment, a method includes forming a bond-pad on a die having an integrated circuit, the bond-pad being electrically coupled to the integrated circuit. A conductive line is then formed on the die, the conductive line having a first end portion attached to the bond-pad and a second end portion spaced apart from the bond-pad. The method can further include forming a via or passage through the die, the bond-pad, and the first end portion of the conductive line, and depositing an electrically conductive material in at least a portion of the passage to form a conductive interconnect extending at least generally through the microelectronic device.
    Type: Application
    Filed: November 13, 2003
    Publication date: May 19, 2005
    Inventors: Sidney Rigg, Charles Watkins, Kyle Kirby, Peter Benson, Salman Akram
  • Patent number: 6877161
    Abstract: Efficient address calculation of invariant reference within a run-time environment is attained by a self-relative numeric reference format for run-time storage of references. A self-relative numeric reference format specifies the location of a reference object relative to a pointer to the referencing object as an integer value. The machine pointers and numeric references may be tagged, and a tag assignment is disclosed so that a self-relative numeric reference is generated from machine pointers by calculating a pointer difference, and a machine pointer to the referenced object is generated by adding the self-relative numeric reference to a machine pointer to the referencing object.
    Type: Grant
    Filed: February 11, 1999
    Date of Patent: April 5, 2005
    Assignee: Oracle International Corp.
    Inventors: Harlan Sexton, David Unietis, Peter Benson
  • Publication number: 20050064681
    Abstract: A support structure for use with a semiconductor substrate in thinning, or backgrinding, thereof, as well as during post-thinning processing of the semiconductor substrate includes a portion which extends substantially along and around an outer periphery of the semiconductor substrate to impart the thinned semiconductor substrate with rigidity. The support structure may be configured as a ring or as a member which substantially covers an active surface of the semiconductor substrate and forms a protective structure over each semiconductor device carried by the active surface. Assemblies that include the support structure and a semiconductor substrate are also within the scope of the present invention, as are methods for forming the support structures and thinning and post-thinning processes that include use of the support structures.
    Type: Application
    Filed: September 19, 2003
    Publication date: March 24, 2005
    Inventors: Alan Wood, Warren Farnworth, David Hembree, Sidney Rigg, William Hiatt, Peter Benson, Kyle Kirby, Salman Akram