Abstract: A photoactive device, comprising a first layer comprising a polymer of formula (1) or a salt thereof, a method comprising illuminating the photoactive device, a method of making the photoactive device, and a composition comprising the polymer of formula (1) and a dye. The photoactive device operates as an inverse phototransistor in which the current is higher in the absence of illumination and lower in the presence of illumination.

Abstract: A thin film molecular memory is provided that satisfies criteria needed to make a molecular spintronic device, based on spin crossover complexes, competitive with silicon technology. These criteria include, device implementation, a low coercive voltage (less than 1V) and low write peak currents (on the order of 104 A/cm2), a device on/off ratio >10, thin film quality, the ability to “lock” the spin state (providing nonvolatility), the ability to isothermally “unlock” and switch the spin state with voltage, conductance change with spin state, room temperature and above room temperature operation, an on-state device resistivity less than 1 ?·cm, a device fast switching speed (less than 100 ps), device endurance (on the order of 1016 switches without degradation), and the ability of having a device with a transistor channel width of 10 nm or below.

Abstract: HfS3-based semiconductor devices that include a substrate layer, a substrate dielectric layer formed on the substrate layer, a bulk layer formed on the substrate dielectric layer, the bulk layer comprising as-synthesized n-type HfS3, and a p-type HfS3 layer formed on the bulk layer, wherein the p-type HfS3 comprises the two-dimensional hole gas (2DHG) layer. FET devices further include first and second electrodes located on the substrate dielectric layer and forming a semiconductor channel between the first and second electrodes.

Abstract: A magneto-electric (ME) majority gate device includes a conducting device and a plurality of ME transistors coupled to the conducting device. In one implementation, the plurality of ME transistors include a ME AND gate device with downward interface polarization, a ME-transmission gate device with downward interface polarization, and a ME-XNOR gate device. In another implementation, the plurality of ME transistors is five single-input ME-FETs.

Abstract: A magneto-electric (ME) XNOR logic gate device includes a conducting device; and a ME-FET coupled to the conducting device. The ME-FET can be formed of a split gate; a first gate terminal coupled to a first portion of the split gate for receiving a first input signal; a second gate terminal coupled to a second portion of the split gate for receiving a second input signal; a source terminal coupled to a ground line; and a drain terminal coupled to the conducting device.

Abstract: A magneto-electric (ME) inverter includes two anti-ferromagnetic spin orbit read (AFSOR) circuit elements, each AFSOR circuit element has a CMOS inverter; and an AFSOR device with a ME base layer; a semiconductor channel layer on the ME base layer and comprising a source terminal and a drain terminal, where the source terminal is coupled to an output of the CMOS inverter; and a gate electrode on the semiconductor channel layer. The gate electrode of a second AFSOR device of the two AFSOR circuit elements is coupled to the drain terminal of a first AFSOR device of the two AFSOR circuit elements.

Abstract: A magneto-electric (ME) majority gate device includes a conducting device and a plurality of ME transistors coupled to the conducting device. In one implementation, the plurality of ME transistors include a ME AND gate device with downward interface polarization, a ME-transmission gate device with downward interface polarization, and a ME-XNOR gate device. In another implementation, the plurality of ME transistors is five single-input ME-FETs.

Abstract: A magneto-electric (ME) inverter includes two anti-ferromagnetic spin orbit read (AFSOR) circuit elements, each AFSOR circuit element has a CMOS inverter; and an AFSOR device with a ME base layer; a semiconductor channel layer on the ME base layer and comprising a source terminal and a drain terminal, where the source terminal is coupled to an output of the CMOS inverter; and a gate electrode on the semiconductor channel layer. The gate electrode of a second AFSOR device of the two AFSOR circuit elements is coupled to the drain terminal of a first AFSOR device of the two AFSOR circuit elements.

Abstract: A magneto-electric (ME) XNOR logic gate device includes a conducting device; and a ME-FET coupled to the conducting device. The ME-FET can be formed of a split gate; a first gate terminal coupled to a first portion of the split gate for receiving a first input signal; a second gate terminal coupled to a second portion of the split gate for receiving a second input signal; a source terminal coupled to a ground line; and a drain terminal coupled to the conducting device.

Abstract: A thin film molecular memory is provided that satisfies criteria needed to make a molecular spintronic device, based on spin crossover complexes, competitive with silicon technology. These criteria include, device implementation, a low coercive voltage (less than 1V) and low write peak currents (on the order of 104 A/cm2), a device on/off ratio >10, thin film quality, the ability to “lock” the spin state (providing nonvolatility), the ability to isothermally “unlock” and switch the spin state with voltage, conductance change with spin state, room temperature and above room temperature operation, an on-state device resistivity less than 1 ?·cm, a device fast switching speed (less than 100 ps), device endurance (on the order of 1016 switches without degradation), and the ability of having a device with a transistor channel width of 10 nm or below.

Abstract: Logic circuits constructed with magnetoelectric (ME) transistors are described herein. A ME logic gate device can include at least one conducting device, for example, at least one MOS transistor; and at least one ME transistor coupled to the at least one conducting device. The ME transistor can be a ME field effect transistor (ME-FET), which can be can be an anti-ferromagnetic spin-orbit read (AFSOR) device or a non-AFSOR device. The gates and logic circuits described herein can be included as standard cells in a design library. Cells of the cell library can include standard cells for a ME inverter device, a ME minority gate device, a ME majority gate device, a ME full adder, a ME XNOR device, a ME XOR device, or a combination thereof.

Abstract: Logic circuits constructed with magnetoelectric (ME) transistors are described herein. A ME logic gate device can include at least one conducting device, for example, at least one MOS transistor; and at least one ME transistor coupled to the at least one conducting device. The ME transistor can be a ME field effect transistor (ME-FET), which can be can be an anti-ferromagnetic spin-orbit read (AFSOR) device or a non-AFSOR device. The gates and logic circuits described herein can be included as standard cells in a design library. Cells of the cell library can include standard cells for a ME inverter device, a ME minority gate device, a ME majority gate device, a ME full adder, a ME XNOR device, a ME XOR device, or a combination thereof.

Abstract: Antiferromagnetic magneto-electric spin-orbit read (AFSOR) logic devices are presented. The devices include a voltage-controlled magnetoelectric (ME) layer that switches polarization in response to an electric field from the applied voltage and a narrow channel conductor of a spin-orbit coupling (SOC) material on the ME layer. One or more sources and one or more drains, each optionally formed of ferromagnetic material, are provided on the SOC material.

Abstract: Antiferromagnetic magneto-electric spin-orbit read (AFSOR) logic devices are presented. The devices include a voltage-controlled magnetoelectric (ME) layer that switches polarization in response to an electric field from the applied voltage and a narrow channel conductor of a spin-orbit coupling (SOC) material on the ME layer. One or more sources and one or more drains, each optionally formed of ferromagnetic material, are provided on the SOC material.

Abstract: Majority and minority logic can be implemented by voltage controlled switching of magneto-electric layers of magneto electric magnetic tunnel junction (ME-MTJ) devices. A ME-MTJ device includes an exchange bias-controlled switching element and a pinned ferromagnetic layer on an antiferromagnetic layer. In one case, the switching element includes a magneto electric (ME) layer on a free ferromagnetic (FM) layer, and is separated from the pinned FM layer by an insulator. To implement a majority or minority logic gate a single ME-MTJ device may be used where the device is provided with three electrodes contacting the ME layer in an overlaying relationship with the ME layer. The orientation of the pinned FM layer indicates whether the gate is a majority or a minority logic gate.

Abstract: Solid state neutron detection utilizing gadolinium as a neutron absorber is described. The new class of narrow-gap neutron-absorbing semiconducting materials, including Gd-doped HfO2, Gd-doped EuO, Gd-doped GaN, Gd2O3 and GdN are included in three types of device structures: (1) a p-n heterostructure diode with a ˜30 ?m Gd-loaded semiconductor grown on a conventional semiconductor (Si or B-doped Si); (2) a p-n junction or a p-i-n trilayer diode with a Gd-loaded semiconductoron one side and single-crystal semiconducting Li2B4O7 layer on the other side of the heterojunction; and (3) a p-n junction or a p-i-n trilayer diode with a Gd-loaded semiconductoron on one side and a boron nitride (BN) semiconductor layer on the other side of the heterojunction.

Abstract: Solid state neutron detection utilizing gadolinium as a neutron absorber is described. The new class of narrow-gap neutron-absorbing semiconducting materials, including Gd-doped HfO2, Gd-doped EuO, Gd-doped GaN, Gd2O3 and GdN are included in three types of device structures: (1) a p-n heterostructure diode with a ˜30 ?m Gd-loaded semiconductor grown on a conventional semiconductor (Si or B-doped Si); (2) a p-n junction or a p-i-n trilayer diode with a Gd-loaded semiconductoron one side and single-crystal semiconducting Li2B4O7 layer on the other side of the heterojunction; and (3) a p-n junction or a p-i-n trilayer diode with a Gd-loaded semiconductoron on one side and a boron nitride (BN) semiconductor layer on the other side of the heterojunction.

Abstract: Boron carbide heteroisomer semiconductor devices are used as particle detectors. The boron carbide semiconductor devices produce electric current in response to incident particles, such as alpha particles, neutrons, or photons.

Abstract: A non-doped n-type boron carbide semiconductor polytype and a method of fabricating the same is provided. The n-type boron carbide polytype may be used in a device for detecting neutrons, electric power conversion, and pulse counting. Such a device may include an n-type boron carbide layer coupled with a substrate where the boron carbide may be an electrically active part of the device. This n-type boron carbide layer may be fabricated through the use of closo-1,7-dicarbadodecaborane (metacarborane). Specifically, the non-doped n-type polytype may be fabricated using SR-CVD by placing the substrate in a vacuum chamber, cooling the substrate, introducing metacarborane into the chamber, adsorbing the metacarborane onto the surface of the substrate through the use of incident X-ray radiation or electron beam irradiation, decomposing the adsorbed metacarborane, and allowing the substrate to reach ambient temperature. The n-type polytype of the present invention may also be fabricated by PECVD.

Abstract: A boron carbide solid state neutron detector and method of using the detector is disclosed, wherein the detector includes a layer of boron carbide wherein the boron carbide layer is an electrically active part of the detection device, a sensing mechanism inherent to said boron carbide layer, wherein the sensing mechanism detects changes in the boron carbide layer caused by the interception of neutrons and a monitoring device coupled to the sensing mechanics.