Patents by Inventor Peter A. Gruber
Peter A. Gruber has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11541472Abstract: Apparatus and methods are disclosed for transferring solder to a substrate. A substrate belt moves one or more substrates in a belt direction. A decal has one or more through holes in a hole pattern that hold solder. Each of the solder holes can align with respective locations on one of the substrates. An ultrasonic head produces an ultrasonic vibration in the solder in a longitudinal direction perpendicular to the belt direction. The ultrasonic head and substrate can be moved together in the longitudinal direction to maintain the ultrasonic head in contact with the solder while the ultrasonic head applies the ultrasonic vibration. Various methods are disclosed including methods of transferring the solder with or without external heating.Type: GrantFiled: January 29, 2020Date of Patent: January 3, 2023Assignee: International Business Machines CorporationInventors: Jae-Woong Nah, Stephen L. Buchwalter, Peter A. Gruber, Paul Alfred Lauro, Da-Yuan Shih
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Patent number: 11270966Abstract: Protruding solder structures are created for electrical attachment of semiconductor devices. A rigid mold having one or more mold openings is attached to and used in combination with a decal structure that has one or more decal holes. The decal structure is disposed on the rigid mold so that the decal openings are aligned over the mold openings. Each of the decal hole and mold opening in contact form a single combined volume. The single combined volumes are filled with solder to form protruding solder structures. Various structures and methods of making and using the structures are disclosed.Type: GrantFiled: November 18, 2019Date of Patent: March 8, 2022Assignee: International Business Machines CorporationInventors: Jae-Woong Nah, Stephen L. Buchwalter, Peter A. Gruber, Paul Alfred Lauro, Da-Yuan Shih
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Patent number: 11110534Abstract: In an Injection Molded Soldering system, a single, one-layer decal has one or more through hole patterns where each through hole pattern has a plurality of through holes through the decal. A drum with a drum circumference turns while the decal is forced to be adjacent to the drum circumference. The decal passes by a tangent point on the drum circumference where one or more solder-filled through hole patterns align with recessed openings on a substrate at the tangent point of the drum circumference. Applied heat causes the solder structures to melt and flow into the recessed openings.Type: GrantFiled: April 8, 2019Date of Patent: September 7, 2021Assignee: International Business Machines CorporationInventors: Jae-Woong Nah, Stephen L. Buchwalter, Peter A. Gruber, Da-Yuan Shih, Paul Alfred Lauro
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Publication number: 20210229203Abstract: Apparatus and methods are disclosed for transferring solder to a substrate. A substrate belt moves one or more substrates in a belt direction. A decal has one or more through holes in a hole pattern that hold solder. Each of the solder holes can align with respective locations on one of the substrates. An ultrasonic head produces an ultrasonic vibration in the solder in a longitudinal direction perpendicular to the belt direction. The ultrasonic head and substrate can be moved together in the longitudinal direction to maintain the ultrasonic head in contact with the solder while the ultrasonic head applies the ultrasonic vibration. Various methods are disclosed including methods of transferring the solder with or without external heating.Type: ApplicationFiled: January 29, 2020Publication date: July 29, 2021Inventors: Jae-Woong Nah, Stephen L. Buchwalter, Peter A. Gruber, Paul Alfred Lauro, Da-Yuan Shih
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Publication number: 20210151402Abstract: Protruding solder structures are created for electrical attachment of semiconductor devices. A rigid mold having one or more mold openings is attached to and used in combination with a decal structure that has one or more decal holes. The decal structure is disposed on the rigid mold so that the decal openings are aligned over the mold openings. Each of the decal hole and mold opening in contact form a single combined volume. The single combined volumes are filled with solder to form protruding solder structures. Various structures and methods of making and using the structures are disclosed.Type: ApplicationFiled: November 18, 2019Publication date: May 20, 2021Inventors: Jae-Woong Nah, Stephen L. Buchwalter, Peter A. Gruber, Paul Alfred Lauro, Da-Yuan Shih
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Patent number: 10833120Abstract: A wafer-scale apparatus and method is described for the automation of forming, aligning and attaching two-dimensional arrays of microoptic elements on semiconductor and other image display devices, backplanes, optoelectronic boards, and integrated optical systems. In an ordered fabrication sequence, a mold plate comprised of optically designed cavities is formed by reactive ion etching or alternative processes, optionally coated with a release material layer and filled with optically specified materials by an automated fluid-injection and defect-inspection subsystem. Optical alignment fiducials guide the disclosed transfer and attachment processes to achieve specified tolerances between the microoptic elements and corresponding optoelectronic devices and circuits.Type: GrantFiled: September 23, 2019Date of Patent: November 10, 2020Assignee: International Business Machines CorporationInventors: Lawrence Jacobowitz, Stephen Buchwalter, Casimer DeCusatis, Peter A. Gruber, Da-Yuan Shih
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Publication number: 20200316702Abstract: In an Injection Molded Soldering system, a single, one-layer decal has one or more through hole patterns where each through hole pattern has a plurality of through holes through the decal. A drum with a drum circumference turns while the decal is forced to be adjacent to the drum circumference. The decal passes by a tangent point on the drum circumference where one or more solder-filled through hole patterns align with recessed openings on a substrate at the tangent point of the drum circumference. Applied heat causes the solder structures to melt and flow into the recessed openings.Type: ApplicationFiled: April 8, 2019Publication date: October 8, 2020Inventors: Jae-Woong Nah, Stephen L. Buchwalter, Peter A. Gruber, Da-Yuan Shih, Paul Alfred Lauro
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Patent number: 10658267Abstract: A system of producing metal cored solder structures on a substrate includes: a decal, a carrier, and receiving elements. The decal includes one or more apertures each of which is tapered from a top surface to a bottom surface thereof. The carrier is positioned beneath the bottom of the decal and includes cavities in a top surface. The cavities are located in alignment with the apertures of the decal. The decal is positioned on the carrier having the decal bottom surface in contact with the carrier top surface to form feature cavities defined by the decal apertures and the carrier cavities. The feature cavities are shaped to receive one or more metal elements and are configured for receiving molten solder cooled in the cavities. The decal is separable from the carrier to partially expose metal core solder contacts. The receiving elements receive the metal core solder contacts thereon.Type: GrantFiled: February 14, 2018Date of Patent: May 19, 2020Assignee: International Business Machines CorporationInventors: Peter A. Gruber, Jae-Woong Nah
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Publication number: 20200020738Abstract: A wafer-scale apparatus and method is described for the automation of forming, aligning and attaching two-dimensional arrays of microoptic elements on semiconductor and other image display devices, backplanes, optoelectronic boards, and integrated optical systems. In an ordered fabrication sequence, a mold plate comprised of optically designed cavities is formed by reactive ion etching or alternative processes, optionally coated with a release material layer and filled with optically specified materials by an automated fluid-injection and defect-inspection subsystem. Optical alignment fiducials guide the disclosed transfer and attachment processes to achieve specified tolerances between the microoptic elements and corresponding optoelectronic devices and circuits.Type: ApplicationFiled: September 23, 2019Publication date: January 16, 2020Inventors: Lawrence Jacobowitz, Stephen Buchwalter, Casimer DeCusatis, Peter A. Gruber, Da-Yuan Shih
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Patent number: 10490594Abstract: A wafer-scale apparatus and method is described for the automation of forming, aligning and attaching two-dimensional arrays of microoptic elements on semiconductor and other image display devices, backplanes, optoelectronic boards, and integrated optical systems. In an ordered fabrication sequence, a mold plate comprised of optically designed cavities is formed by reactive ion etching or alternative processes, optionally coated with a release material layer and filled with optically specified materials by an automated fluid-injection and defect-inspection subsystem. Optical alignment fiducials guide the disclosed transfer and attachment processes to achieve specified tolerances between the microoptic elements and corresponding optoelectronic devices and circuits.Type: GrantFiled: October 14, 2016Date of Patent: November 26, 2019Assignee: International Business Machines CorporationInventors: Lawrence Jacobwitz, Stephen Buchwalter, Casimer DeCusatis, Peter A. Gruber, Da-Yuan Shih
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Publication number: 20180174949Abstract: A system of producing metal cored solder structures on a substrate includes: a decal, a carrier, and receiving elements. The decal includes one or more apertures each of which is tapered from a top surface to a bottom surface thereof. The carrier is positioned beneath the bottom of the decal and includes cavities in a top surface. The cavities are located in alignment with the apertures of the decal. The decal is positioned on the carrier having the decal bottom surface in contact with the carrier top surface to form feature cavities defined by the decal apertures and the carrier cavities. The feature cavities are shaped to receive one or more metal elements and are configured for receiving molten solder cooled in the cavities. The decal is separable from the carrier to partially expose metal core solder contacts. The receiving elements receive the metal core solder contacts thereon.Type: ApplicationFiled: February 14, 2018Publication date: June 21, 2018Inventors: Peter A. Gruber, Jae-Woong Nah
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Patent number: 9972556Abstract: A system of producing metal cored solder structures on a substrate includes: a decal having a plurality of apertures, the apertures being tapered from a top surface to a bottom surface of the decal; a carrier configured for positioning beneath the bottom of the decal, the carrier having cavities in a top surface and the cavities located in alignment with the apertures of the decal; the decal being configured for positioning on the carrier having the decal bottom surface in contact with the carrier top surface to form feature cavities defined by the decal apertures and the carrier cavities, the feature cavities being shaped to receive a plurality of metal elements therein, the feature cavities configured for receiving molten solder being cooled in the cavities, the decal being separable from the carrier to partially expose metal core solder contacts; and receiving elements of a substrate being configured to receive the metal core solder contacts thereon, and the metal core solder contacts being exposed and posType: GrantFiled: July 13, 2015Date of Patent: May 15, 2018Assignee: International Business Machines CorporationInventors: Peter A. Gruber, Jae-Woong Nah
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Patent number: 9679875Abstract: A method of forming a reduced volume interconnect for a chip stack including multiple silicon layers, the method including: forming multiple conductive structures, each of at least a subset of the conductive structures having a volume of conductive material for a corresponding under bump metallurgy pad onto which the conductive structure is transferred that is configured such that a ratio of an unreflowed diameter of the conductive structure to a diameter of the corresponding pad is about one third-to-one or less; transferring the conductive structures to the silicon layers; stacking the silicon layers in a substantially vertical dimension such that each of the conductive structures on a given silicon layer is aligned with a corresponding electrical contact location on an underside of an adjacent silicon layer; and heating the interconnect so as to metallurgically bond multiple electrical contact locations of adjacent silicon layers.Type: GrantFiled: April 22, 2016Date of Patent: June 13, 2017Assignee: International Business Machines CorporationInventors: Peter A. Gruber, Katsuyuki Sakuma, Da-Yuan Shih
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Publication number: 20170033153Abstract: A wafer-scale apparatus and method is described for the automation of forming, aligning and attaching two-dimensional arrays of microoptic elements on semiconductor and other image display devices, backplanes, optoelectronic boards, and integrated optical systems. In an ordered fabrication sequence, a mold plate comprised of optically designed cavities is formed by reactive ion etching or alternative processes, optionally coated with a release material layer and filled with optically specified materials by an automated fluid-injection and defect-inspection subsystem. Optical alignment fiducials guide the disclosed transfer and attachment processes to achieve specified tolerances between the microoptic elements and corresponding optoelectronic devices and circuits.Type: ApplicationFiled: October 14, 2016Publication date: February 2, 2017Inventors: Lawrence Jacobowitz, Stephen Buchwalter, Casimer DeCusatis, Peter A. Gruber, Da-Yuan Shih
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Patent number: 9543273Abstract: A method of forming a reduced volume interconnect for a chip stack including multiple silicon layers, the method including: forming multiple conductive structures, each of at least a subset of the conductive structures having a volume of conductive material for a corresponding under bump metallurgy pad onto which the conductive structure is transferred that is configured such that a ratio of an unreflowed diameter of the conductive structure to a diameter of the corresponding pad is about one third-to-one or less; transferring the conductive structures to the silicon layers; stacking the silicon layers in a substantially vertical dimension such that each of the conductive structures on a given silicon layer is aligned with a corresponding electrical contact location on an underside of an adjacent silicon layer; and heating the interconnect so as to metallurgically bond multiple electrical contact locations of adjacent silicon layers.Type: GrantFiled: January 19, 2015Date of Patent: January 10, 2017Assignee: International Business Machines CorporationInventors: Peter A. Gruber, Katsuyuki Sakuma, Da-Yuan Shih
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Patent number: 9490408Abstract: A wafer-scale apparatus and method is described for the automation of forming, aligning and attaching two-dimensional arrays of microoptic elements on semiconductor and other image display devices, backplanes, optoelectronic boards, and integrated optical systems. In an ordered fabrication sequence, a mold plate comprised of optically designed cavities is formed by reactive ion etching or alternative processes, optionally coated with a release material layer and filled with optically specified materials by an automated fluid-injection and defect-inspection subsystem. Optical alignment fiducials guide the disclosed transfer and attachment processes to achieve specified tolerances between the microoptic elements and corresponding optoelectronic devices and circuits.Type: GrantFiled: September 13, 2013Date of Patent: November 8, 2016Assignee: International Business Machines CorporationInventors: Lawrence Jacobowitz, Stephen Buchwalter, Casimer DeCusatis, Peter A. Gruber, Da-Yuan Shih
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Publication number: 20160240501Abstract: A method of forming a reduced volume interconnect for a chip stack including multiple silicon layers, the method including: forming multiple conductive structures, each of at least a subset of the conductive structures having a volume of conductive material for a corresponding under bump metallurgy pad onto which the conductive structure is transferred that is configured such that a ratio of an unreflowed diameter of the conductive structure to a diameter of the corresponding pad is about one third-to-one or less; transferring the conductive structures to the silicon layers; stacking the silicon layers in a substantially vertical dimension such that each of the conductive structures on a given silicon layer is aligned with a corresponding electrical contact location on an underside of an adjacent silicon layer; and heating the interconnect so as to metallurgically bond multiple electrical contact locations of adjacent silicon layers.Type: ApplicationFiled: April 22, 2016Publication date: August 18, 2016Inventors: Peter A. Gruber, Katsuyuki Sakuma, Da-Yuan Shih
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Publication number: 20160211242Abstract: A method of forming a reduced volume interconnect for a chip stack including multiple silicon layers, the method including: forming multiple conductive structures, each of at least a subset of the conductive structures having a volume of conductive material for a corresponding under bump metallurgy pad onto which the conductive structure is transferred that is configured such that a ratio of an unreflowed diameter of the conductive structure to a diameter of the corresponding pad is about one third-to-one or less; transferring the conductive structures to the silicon layers; stacking the silicon layers in a substantially vertical dimension such that each of the conductive structures on a given silicon layer is aligned with a corresponding electrical contact location on an underside of an adjacent silicon layer; and heating the interconnect so as to metallurgically bond multiple electrical contact locations of adjacent silicon layers.Type: ApplicationFiled: January 19, 2015Publication date: July 21, 2016Inventors: Peter A. Gruber, Katsuyuki Sakuma, Da-Yuan Shih
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Patent number: 9295166Abstract: Multiple injections of molten solder are employed to form double solder bumps having outer layers that melt at lower temperatures than the inner portions thereof. During a flip chip assembly process, the reflow temperature is above the melting temperature of the outer layers and below the melting temperature of the inner portions of the solder bumps. As the inner portions of the solder bumps do not collapse during reflow, a flip chip assembly can be made at relatively low temperatures and have a high stand-off height. A structure having double solder bumps facilitates flip chip assembly.Type: GrantFiled: March 20, 2015Date of Patent: March 22, 2016Assignee: GLOBALFOUNDRIES INC.Inventors: Peter A. Gruber, Paul A. Lauro, Jae-Woong Nah
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Patent number: 9278401Abstract: A fill head apparatus includes at least one chamber for holding a fluid. The chamber has an outlet for expelling the fluid. A vacuum device has an inlet for a suction device adjacent to the fluid outlet. A plurality of flexible and resilient sealing devices contact a top surface of a workpiece. The sealing devices are positioned on opposing sides of the chamber outlet and on opposing sides of the vacuum device inlet, such that the sealing devices create at least a partial seal around a cavity defined by the workpiece and the cavity is beneath both the chamber outlet and the vacuum outlet.Type: GrantFiled: February 11, 2013Date of Patent: March 8, 2016Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Glen N. Biggs, Russell A. Budd, Benjamin V. Fasano, John J. Garant, Peter A. Gruber, John P. Karidis, Bouwe W. Leenstra, Phillip W. Palmatier, Kevin M. Prettyman, Christopher L. Tessler, Thomas Weiss