Patents by Inventor Peter A. Levine
Peter A. Levine has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10039486Abstract: An apparatus and method for diagnosing and/or treating autonomic dysregulation is disclosed. In a preferred embodiment, a user is presented stressful audio-visual content at a known time. The resulting amount of deviation of the user's autonomic nervous system from stasis is automatically quantified periodically subsequent to the presentation of the stressful audio-visual content by monitoring a parameter of the user's heartbeat over time, thus automatically measuring both the amount of disturbance in the user's autonomic nervous system, and the re-settling time of the user's autonomic nervous system for given stressful audio-visual content. The apparatus may then guide the user through one or more awareness exercises, and subsequently re-measure the user's response to stressful audio-visual content.Type: GrantFiled: December 24, 2017Date of Patent: August 7, 2018Inventor: Peter Levine
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Publication number: 20170097317Abstract: The described embodiments may provide a chemical detection circuit that may comprise a plurality of first output circuits at a first side and a plurality of second output circuits at a second side of the chemical detection circuit. The chemical detection circuit may further comprise a plurality of tiles of pixels each placed between respective pairs of first and second output circuits. Each tile may include four quadrants of pixels. Each quadrant may have columns with designated first columns interleaved with second columns. Each first column may be coupled to a respective first output circuit in first and second quadrants, and to a respective second output circuit in third and fourth quadrants. Each second column may be coupled to a respective second output circuit in first and second quadrants, and to a respective first output circuit in third and fourth quadrants.Type: ApplicationFiled: October 13, 2016Publication date: April 6, 2017Inventors: Kim Johnson, Jeremy Jordan, Peter Levine, Mark Milgrew
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Patent number: 8823380Abstract: One or more charge pumps may be used to amplify the output voltage from a chemically-sensitive pixel that comprises one or more transistors. A charge pump may include a number of track stage switches, a number of boost phase switches and a number of capacitors. The capacitors are in parallel during the track phase and in series during the boost phase, and the total capacitance is divided during the boost phase while the total charge remains fixed. Consequently, the output voltage is pushed up.Type: GrantFiled: June 30, 2011Date of Patent: September 2, 2014Assignee: Life Technologies CorporationInventors: Peter Levine, Mark Milgrew, Todd Rearick
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Patent number: 8731847Abstract: The described embodiments may provide a chemical detection circuit that may comprise a plurality of first output circuits at a first side and a plurality of second output circuits at a second side of the chemical detection circuit. The chemical detection circuit may further comprise a plurality of tiles of pixels each placed between respective pairs of first and second output circuits. Each tile may include four quadrants of pixels. Each quadrant may have columns with designated first columns interleaved with second columns. Each first column may be coupled to a respective first output circuit in first and second quadrants, and to a respective second output circuit in third and fourth quadrants. Each second column may be coupled to a respective second output circuit in first and second quadrants, and to a respective first output circuit in third and fourth quadrants.Type: GrantFiled: June 30, 2011Date of Patent: May 20, 2014Assignee: Life Technologies CorporationInventors: Kim Johnson, Jeremy Jordan, Peter Levine, Mark Milgrew
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Patent number: 8432149Abstract: The described embodiments may provide a chemical detection circuit with an improved signal-to-noise ration. The chemical detection circuit may include a current source, a chemical detection pixel, an amplifier and a capacitor. The chemical detection pixel may comprise a chemical-sensitive transistor that may have a first and second terminals and a row-select switch coupled between the current source and chemically-sensitive transistor. The amplifier may have a first input and a second input, with the first input coupled to an output of the chemically-sensitive transistor via a switch and the second input coupled to an offset voltage line. The capacitor may be coupled between an output of the amplifier and the first input of the amplifier. The capacitor and amplifier may form an integrator and may be shared by a column of chemical detection pixels.Type: GrantFiled: June 30, 2011Date of Patent: April 30, 2013Assignee: Life Technologies CorporationInventor: Peter Levine
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Patent number: 8432150Abstract: Methods are described for reading a chemically-sensitive field-effect transistor (chemFET) with an improved signal-to-noise ratio. In one embodiment, a method is described for reading a chemFET having a first terminal and a second terminal, and a floating gate coupled to a passivation layer. The method includes biasing the first terminal of the chemFET to a first bias voltage during a read interval. The second terminal of the chemFET is coupled to a data line during the read interval. A current is induced through the chemFET via the data line. An output signal proportional to an integral of a voltage or current on the data line is generated in response to the induced current through the chemFET during the read interval.Type: GrantFiled: March 15, 2012Date of Patent: April 30, 2013Assignee: Life Technologies CorporationInventor: Peter Levine
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Patent number: 8421437Abstract: Circuits are described for reading a chemically-sensitive field-effect transistor (chemFET) with an improved signal-to-noise ratio. In one embodiment, a device is described that includes a chemFET including a first terminal and a second terminal, and a floating gate coupled to a passivation layer. An integrator circuit is coupled to the second source/drain terminal of the chemFET via a data line. The integrator circuit applies a bias voltage to the data line during a read interval, thereby inducing a current through the chemFET based on a threshold voltage of the chemFET. The integrator circuit then generates an output signal proportional to an integral of the induced current through the chemFET during the read interval.Type: GrantFiled: March 15, 2012Date of Patent: April 16, 2013Assignee: Life Technologies CorporationInventor: Peter Levine
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Publication number: 20120228136Abstract: Circuits are described for reading a chemically-sensitive field-effect transistor (chemFET) with an improved signal-to-noise ratio. In one embodiment, a device is described that includes a chemFET including a first terminal and a second terminal, and a floating gate coupled to a passivation layer. An integrator circuit is coupled to the second source/drain terminal of the chemFET via a data line. The integrator circuit applies a bias voltage to the data line during a read interval, thereby inducing a current through the chemFET based on a threshold voltage of the chemFET. The integrator circuit then generates an output signal proportional to an integral of the induced current through the chemFET during the read interval.Type: ApplicationFiled: March 15, 2012Publication date: September 13, 2012Applicant: LIFE TECHNOLOGIES CORPORATIONInventor: Peter Levine
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Publication number: 20120228159Abstract: Methods are described for reading a chemically-sensitive field-effect transistor (chemFET) with an improved signal-to-noise ratio. In one embodiment, a method is described for reading a chemFET having a first terminal and a second terminal, and a floating gate coupled to a passivation layer. The method includes biasing the first terminal of the chemFET to a first bias voltage during a read interval. The second terminal of the chemFET is coupled to a data line during the read interval. A current is induced through the chemFET via the data line. An output signal proportional to an integral of a voltage or current on the data line is generated in response to the induced current through the chemFET during the read interval.Type: ApplicationFiled: March 15, 2012Publication date: September 13, 2012Applicant: LIFE TECHNOLOGIES CORPORATIONInventor: Peter Levine
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Publication number: 20120022795Abstract: The described embodiments may provide a chemical detection circuit that may comprise a plurality of first output circuits at a first side and a plurality of second output circuits at a second side of the chemical detection circuit. The chemical detection circuit may further comprise a plurality of tiles of pixels each placed between respective pairs of first and second output circuits. Each tile may include four quadrants of pixels. Each quadrant may have columns with designated first columns interleaved with second columns. Each first column may be coupled to a respective first output circuit in first and second quadrants, and to a respective second output circuit in third and fourth quadrants. Each second column may be coupled to a respective second output circuit in first and second quadrants, and to a respective first output circuit in third and fourth quadrants.Type: ApplicationFiled: June 30, 2011Publication date: January 26, 2012Applicant: LIFE TECHNOLOGIES CORPORATIONInventors: Kim JOHNSON, Jeremy JORDAN, Peter LEVINE, Mark MILGREW
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Publication number: 20120001685Abstract: One or more charge pumps may be used to amplify the output voltage from a chemically-sensitive pixel that comprises one or more transistors. A charge pump may include a number of track stage switches, a number of boost phase switches and a number of capacitors. The capacitors are in parallel during the track phase and in series during the boost phase, and the total capacitance is divided during the boost phase while the total charge remains fixed. Consequently, the output voltage is pushed up.Type: ApplicationFiled: June 30, 2011Publication date: January 5, 2012Applicant: LIFE TECHNOLOGIES CORPORATIONInventors: Peter LEVINE, Mark MILGREW, Todd REARICK
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Publication number: 20120001615Abstract: The described embodiments may provide a chemical detection circuit with an improved signal-to-noise ration. The chemical detection circuit may include a current source, a chemical detection pixel, an amplifier and a capacitor. The chemical detection pixel may comprise a chemical-sensitive transistor that may have a first and second terminals and a row-select switch coupled between the current source and chemically-sensitive transistor. The amplifier may have a first input and a second input, with the first input coupled to an output of the chemically-sensitive transistor via a switch and the second input coupled to an offset voltage line. The capacitor may be coupled between an output of the amplifier and the first input of the amplifier. The capacitor and amplifier may form an integrator and may be shared by a column of chemical detection pixels.Type: ApplicationFiled: June 30, 2011Publication date: January 5, 2012Applicant: LIFE TECHNOLOGIES CORPORATIONInventor: Peter LEVINE
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Patent number: 7932575Abstract: A method for fabricating a back-illuminated semiconductor imaging device on a semiconductor-on-insulator substrate, and resulting imaging device is disclosed. The method for manufacturing the imaging device includes the steps of providing a substrate comprising an insulator layer, and an epitaxial layer substantially overlying the insulator layer; fabricating at least one imaging component at least partially overlying and extending into the epitaxial layer; forming a plurality of bond pads substantially overlying the epitaxial layer; fabricating a dielectric layer substantially overlying the epitaxial layer and the at least one imaging component; providing a handle wafer; forming a plurality of conductive trenches in the handle wafer; forming a plurality of conductive bumps on a first surface of the handle wafer substantially underlying the conductive trenches; and bonding the plurality of conductive bumps to the plurality of bond pads.Type: GrantFiled: April 28, 2009Date of Patent: April 26, 2011Assignee: SRI InternationalInventors: Mahalingam Bhaskaran, Pradyumna Kumar Swain, Peter Levine, Norman Goldsmith
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Patent number: 7830431Abstract: A new method of reading an imager is achieved. The method comprises providing an imager array comprising n rows and m columns where a pair of rows can be read during a single row access time. A first image field is completed by sequentially reading and storing pixel values of pairs of adjacent rows of the imager array. The reading begins at a first row, and the reading stops when less than three rows are unread. Thereafter pixel values of the next row are read and not stored. Thereafter pixel values of the first row of the imager array are read and not stored. A second image field is completed by sequentially reading and storing pixel values of pairs of adjacent rows. The reading begins at the second row, the reading stops when less than two rows are unread.Type: GrantFiled: June 12, 2009Date of Patent: November 9, 2010Assignee: Digital Imaging Systems GmbHInventors: Nathaniel Joseph McCaffrey, Peter Zalud, Peter Levine, Gary Hughes
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Patent number: 7777229Abstract: A method for fabricating a back-illuminated semiconductor imaging device and resulting imaging device is disclosed, which includes the steps providing a substrate having a front surface and a back surface; growing an epitaxial layer substantially overlying the front surface of the substrate; forming at least one barrier layer substantially within the epitaxial layer; fabricating at least one imaging structure overlying and extending into the epitaxial layer, the imaging structure at least one charge transfer region, the at least one barrier layer substantially underlying the at least one charge transfer region, wherein light incident on the back surface of the substrate generates charge carriers which are diverted away from the at least one charge transfer region by the at least one barrier layer. At least a portion of the epitaxial layer is grown using an epitaxial lateral overgrowth technique.Type: GrantFiled: August 24, 2007Date of Patent: August 17, 2010Assignee: Sarnoff CorporationInventors: Pradyumna Kumar Swain, Mahalingam Bhaskaran, Peter Levine, Norman Goldsmith
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Patent number: 7622342Abstract: A method for fabricating a back-illuminated semiconductor imaging device on a semiconductor-on-insulator substrate, and resulting imaging device is disclosed. A substrate which includes an insulator layer and an epitaxial layer substantially overlying the insulator layer is provided. At least one bond pad region is formed extending into the epitaxial layer to a surface of the insulator layer. At least one bond pad is fabricated at least partially overlying the at least one bond pad region. At least one imaging component is fabricated at least partially overlying and extending into the epitaxial layer. A passivation layer is fabricated substantially overlying the epitaxial layer, the at least one bond pad, and the at least one imaging component. A handle wafer is bonded to the passivation layer. The at least a portion of the insulator layer and at least a portion of the bond pad region is etched to expose at least a portion of the at least one bond pad.Type: GrantFiled: January 28, 2008Date of Patent: November 24, 2009Assignee: Sarnoff CorporationInventors: Pradyumna Kumar Swain, Mahalingam Bhaskaran, Peter Levine
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Publication number: 20090256227Abstract: A method for fabricating a back-illuminated semiconductor imaging device on a semiconductor-on-insulator substrate, and resulting imaging device is disclosed. The method for manufacturing the imaging device includes the steps of providing a substrate comprising an insulator layer, and an epitaxial layer substantially overlying the insulator layer; fabricating at least one imaging component at least partially overlying and extending into the epitaxial layer; forming a plurality of bond pads substantially overlying the epitaxial layer; fabricating a dielectric layer substantially overlying the epitaxial layer and the at least one imaging component; providing a handle wafer; forming a plurality of conductive trenches in the handle wafer; forming a plurality of conductive bumps on a first surface of the handle wafer substantially underlying the conductive trenches; and bonding the plurality of conductive bumps to the plurality of bond pads.Type: ApplicationFiled: April 28, 2009Publication date: October 15, 2009Inventors: Mahalingam Bhaskaran, Pradyumna Kumar Swain, Peter Levine, Norman Goldsmith
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Publication number: 20090256942Abstract: A new method of reading an imager is achieved. The method comprises providing an imager array comprising n rows and m columns where a pair of rows can be read during a single row access time. A first image field is completed by sequentially reading and storing pixel values of pairs of adjacent rows of the imager array. The reading begins at a first row, and the reading stops when less than three rows are unread. Thereafter pixel values of the next row are read and not stored. Thereafter pixel values of the first row of the imager array are read and not stored. A second image field is completed by sequentially reading and storing pixel values of pairs of adjacent rows. The reading begins at the second row, the reading stops when less than two rows are unread.Type: ApplicationFiled: June 12, 2009Publication date: October 15, 2009Inventors: Nathaniel Joseph McCaffrey, Peter Zalud, Peter Levine, Gary Hughes
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Patent number: 7554590Abstract: A new method of reading an imager is achieved. The method comprises providing an imager array comprising n rows and m columns where a pair of rows can be read during a single row access time. A first image field is completed by sequentially reading and storing pixel values of pairs of adjacent rows of the imager array. The reading begins at a first row, and the reading stops when less than three rows are unread. Thereafter pixel values of the next row are read and not stored. Thereafter pixel values of the first row of the imager array are read and not stored. A second image field is completed by sequentially reading and storing pixel values of pairs of adjacent rows. The reading begins at the second row, the reading stops when less than two rows are unread.Type: GrantFiled: December 23, 2003Date of Patent: June 30, 2009Assignee: Digital Imaging Systems GmbHInventors: Nathaniel Joseph McCaffrey, Peter Zalud, Peter Levine, Gary Hughes
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Patent number: 7541256Abstract: A method for fabricating a back-illuminated semiconductor imaging device on a semiconductor-on-insulator substrate, and resulting imaging device is disclosed. The method for manufacturing the imaging device includes the steps of providing a substrate comprising an insulator layer, and an epitaxial layer substantially overlying the insulator layer; fabricating at least one imaging component at least partially overlying and extending into the epitaxial layer; forming a plurality of bond pads substantially overlying the epitaxial layer; fabricating a dielectric layer substantially overlying the epitaxial layer and the at least one imaging component; providing a handle wafer; forming a plurality of conductive trenches in the handle wafer; forming a plurality of conductive bumps on a first surface of the handle wafer substantially underlying the conductive trenches; and bonding the plurality of conductive bumps to the plurality of bond pads.Type: GrantFiled: July 18, 2007Date of Patent: June 2, 2009Assignee: Sarnoff CorporationInventors: Pradyumna Kumar Swain, Peter Levine, Mahalingam Bhaskaran, Norman Goldsmith