Patents by Inventor Peter Aaen

Peter Aaen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12562488
    Abstract: Provided herein are various enhancements for planar antennas and corresponding antenna arrays. In one example, an assembly includes a plurality of antenna cells formed in a shared printed circuit board stackup, a rigid superstrate layer mounted onto the printed circuit board stackup, and a substrate layer mounting the printed circuit board stackup to a baseplate. Each of the antenna cells comprise conductive plates at quadrants of the antenna cell and coupled through vias in the layered stackup arrangement from a plate layer to a ground plane layer, flared antenna feeds arranged in an orthogonal pair positioned within central gaps between the conductive plates and below the plate layer, and barrier vias positioned in sets below the conductive plates in each of the quadrants and arrayed about the flared antenna feeds.
    Type: Grant
    Filed: December 21, 2023
    Date of Patent: February 24, 2026
    Assignees: LOCKHEED MARTIN CORPORATION, ROGERS CORPORATION, COLORADO SCHOOL OF MINES
    Inventors: Peter Moschetti, Thomas Henry Hand, Roger Douglas Hasse, Peter Aaen, Mahyar Vahabzadeh, Erik Lier, Elie Germain Tianang
  • Publication number: 20070235855
    Abstract: A wirebond array (100) comprising a plurality of signal wires 110 and a plurality of ground wires (120) interdigitated with and substantially parallel to the set of signal wires (110). In one embodiment, each of the plurality of signal wires (110) and ground wires (120) is attached to a first semiconductor device (102) (e.g., a microwave power device). In another, each of the plurality of signal wires (110) is further attached to a package lead (104). In one embodiment, each of the plurality of ground wires (120) is further attached to a ground connection region (106) substantially coplanar with the package lead (104). Alternatively, each of the plurality of signal wires (110) is further attached to a second semiconductor device, wherein each of the plurality of ground wires (120) is further attached to the second semiconductor device.
    Type: Application
    Filed: March 29, 2006
    Publication date: October 11, 2007
    Inventors: Mario Bokatius, Peter Aaen, Brian Condie