Patents by Inventor Peter B. Chon

Peter B. Chon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9251005
    Abstract: Disclosed is a power isolation and backup system. When a power fail condition is detected, temporary storage is flushed to an SDRAM. After the flush, interfaces are halted, and power is removed from most of the chip except the SDRAM subsystem. The SDRAM subsystem copies data from an SDRAM to a flash memory. On the way, the data may be encrypted, and/or a data integrity signature calculated. To restore data, the SDRAM subsystem copies data from the flash memory to the SDRAM. On the way, the data being restored may be decrypted, and/or a data integrity signature checked.
    Type: Grant
    Filed: April 6, 2011
    Date of Patent: February 2, 2016
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: James Yu, Gary J. Piccirillo, Peter B. Chon
  • Patent number: 9043642
    Abstract: Disclosed is a power isolation and backup system. When a power fail condition is detected, temporary storage is flushed to an SDRAM. After the flush, interfaces are halted, and power is removed from most of the chip except the SDRAM subsystem. The SDRAM subsystem copies data from an SDRAM to a flash memory. On the way, the data may be encrypted, and/or a data integrity signature calculated. To restore data, the SDRAM subsystem copies data from the flash memory to the SDRAM. On the way, the data being restored may be decrypted, and/or a data integrity signature checked.
    Type: Grant
    Filed: April 8, 2011
    Date of Patent: May 26, 2015
    Assignee: Avago Technologies General IP Singapore) Pte Ltd
    Inventors: Peter B. Chon, James Yu, David M. Olson, Timothy E. Hoglund, Gary J. Piccirillo
  • Patent number: 8826098
    Abstract: Disclosed is a power isolation and backup system. When a power fail condition is detected, temporary storage is flushed to an SDRAM. After the flush, interfaces are halted, and power is removed from most of the chip except the SDRAM subsystem. The SDRAM subsystem copies data from an SDRAM to a flash memory. On the way, the data may be encrypted, and/or a data integrity signature calculated. If an error is detected, a data integrity signature may be corrupted. A completion signature may be written. To restore data, the SDRAM subsystem copies data from the flash memory to the SDRAM. On the way, the data being restored may be decrypted, and/or a data integrity signature and completion signature checked.
    Type: Grant
    Filed: May 10, 2011
    Date of Patent: September 2, 2014
    Assignee: LSI Corporation
    Inventors: Gary J. Piccirillo, Peter B. Chon
  • Patent number: 8738843
    Abstract: Disclosed is a power isolation and backup system. When a power fail condition is detected, temporary storage is flushed to an SDRAM. After the flush, interfaces are halted, and power is removed from most of the chip except the SDRAM subsystem. The SDRAM subsystem copies data from an SDRAM to a flash memory. On the way, the data may be encrypted, and/or a data integrity signature calculated. To restore data, the SDRAM subsystem copies data from the flash memory to the SDRAM. On the way, the data being restored may be decrypted, and/or a data integrity signature checked.
    Type: Grant
    Filed: April 8, 2011
    Date of Patent: May 27, 2014
    Assignee: LSI Corporation
    Inventors: Gary J. Piccirillo, Peter B. Chon
  • Publication number: 20120159239
    Abstract: Disclosed is a power isolation and backup system. When a power fail condition is detected, temporary storage is flushed to an SDRAM. After the flush, interfaces are halted, and power is removed from most of the chip except the SDRAM subsystem. The SDRAM subsystem copies data from an SDRAM to a flash memory. On the way, the data may be encrypted, and/or a data integrity signature calculated. To restore data, the SDRAM subsystem copies data from the flash memory to the SDRAM. On the way, the data being restored may be decrypted, and/or a data integrity signature checked.
    Type: Application
    Filed: April 8, 2011
    Publication date: June 21, 2012
    Inventors: Peter B. Chon, James Yu, David M. Olson, Timothy E. Hoglund, Gary J. Piccirillo
  • Publication number: 20120159106
    Abstract: Disclosed is a power isolation and backup system. When a power fail condition is detected, temporary storage is flushed to an SDRAM. After the flush, interfaces are halted, and power is removed from most of the chip except the SDRAM subsystem. The SDRAM subsystem copies data from an SDRAM to a flash memory. On the way, the data may be encrypted, and/or a data integrity signature calculated. To restore data, the SDRAM subsystem copies data from the flash memory to the SDRAM. On the way, the data being restored may be decrypted, and/or a data integrity signature checked.
    Type: Application
    Filed: April 8, 2011
    Publication date: June 21, 2012
    Inventors: Gary J. Piccirillo, Peter B. Chon
  • Publication number: 20120159060
    Abstract: Disclosed is a power isolation and backup system. When a power fail condition is detected, temporary storage is flushed to an SDRAM. After the flush, interfaces are halted, and power is removed from most of the chip except the SDRAM subsystem. The SDRAM subsystem copies data from an SDRAM to a flash memory. On the way, the data may be encrypted, and/or a data integrity signature calculated. To restore data, the SDRAM subsystem copies data from the flash memory to the SDRAM. On the way, the data being restored may be decrypted, and/or a data integrity signature checked.
    Type: Application
    Filed: April 6, 2011
    Publication date: June 21, 2012
    Inventors: James Yu, Gary J. Piccirillo, Peter B. Chon
  • Publication number: 20120159289
    Abstract: Disclosed is a power isolation and backup system. When a power fail condition is detected, temporary storage is flushed to an SDRAM. After the flush, interfaces are halted, and power is removed from most of the chip except the SDRAM subsystem. The SDRAM subsystem copies data from an SDRAM to a flash memory. On the way, the data may be encrypted, and/or a data integrity signature calculated. If an error is detected, a data integrity signature may be corrupted. A completion signature may be written. To restore data, the SDRAM subsystem copies data from the flash memory to the SDRAM. On the way, the data being restored may be decrypted, and/or a data integrity signature and completion signature checked.
    Type: Application
    Filed: May 10, 2011
    Publication date: June 21, 2012
    Inventors: Gary J. Piccirillo, Peter B. Chon
  • Patent number: 7793010
    Abstract: An apparatus and a computer-implemented method for processing data in a bus system component. The bus system component is configured to operate in one of an endpoint mode and a root complex mode. Responsive to configuring the bus system component to operate in endpoint mode, the data is processed through the bus system component according to an endpoint process. Responsive to configuring the bus system component to operate in root complex mode, the data is transferred through the bus system component according to a root complex mode. In an illustrative example, the bus system component is a peripheral control interconnect express component.
    Type: Grant
    Filed: November 22, 2005
    Date of Patent: September 7, 2010
    Assignee: LSI Corporation
    Inventors: David M. Olson, Gary Piccirillo, Peter B. Chon