Abstract: A Capacitive Micromachined Ultrasonic Transducer (CMUT) device includes at least one CMUT cell including a first substrate having a top side including a patterned dielectric layer thereon including a thick and a thin dielectric region. A membrane layer is bonded on the thick dielectric region and over the thin dielectric region to provide a movable membrane over a micro-electro-mechanical system (MEMS) cavity. A through-substrate via (TSV) includes a dielectric liner which extends from a bottom side of the first substrate to a top surface of the membrane layer. A top side metal layer includes a first portion over the TSV, over the movable membrane, and coupling the TSV to the movable membrane. A patterned metal layer is on the bottom side surface of the first substrate including a first patterned layer portion contacting the bottom side of the first substrate lateral to the TSV.

Abstract: A method of forming a capacitive micro-electro-mechanical system (MEMS) sensor device includes at least one capacitive MEMS sensor element with at least one capacitive MEMS sensor cell. A patterned dielectric layer including a thick dielectric region and a thin dielectric region is formed on a top side of a first substrate. A second substrate is bonded to the thick dielectric region to provide at least one sealed micro-electro-mechanical system (MEMS) cavity. The second substrate is thinned to reduce a thickness of said second substrate to provide a membrane layer. Vias are etched through the membrane layer and said thick dielectric region extending into the first substrate to form embedded vias. A dielectric liner which lines the embedded vias is formed within the first substrate. The embedded vias are filed with electrically conductive TSV filler material to form a plurality of through-substrate vias (TSVs), said plurality of TSVs extending to at least a top of said membrane layer.

Abstract: A Capacitive Micromachined Ultrasonic Transducer (CMUT) device including at least one CMUT element with at least one CMUT cell is formed. A patterned dielectric layer thereon including a thick and a thin dielectric region is formed on a top side of a single crystal material substrate. A second substrate is bonded to the thick dielectric region to provide at least one sealed micro-electro-mechanical system (MEMS) cavity. The second substrate is thinned to reduce a thickness of said second substrate to provide a membrane layer. The membrane layer is etched to form a movable membrane over said MEMS cavity and to remove said membrane layer over said top side substrate contact area. The thin dielectric region is removed from over said top side substrate contact area. A top side metal layer is formed including a trace portion coupling said top side substrate contact area to said movable membrane.

Abstract: A Capacitive Micromachined Ultrasonic Transducer (CMUT) device includes at least one CMUT cell including a first substrate having a top side including a patterned dielectric layer thereon including a thick and a thin dielectric region. A membrane layer is bonded on the thick dielectric region and over the thin dielectric region to provide a movable membrane over a micro-electro-mechanical system (MEMS) cavity. A through-substrate via (TSV) includes a dielectric liner which extends from a bottom side of the first substrate to a top surface of the membrane layer. A top side metal layer includes a first portion over the TSV, over the movable membrane, and coupling the TSV to the movable membrane. A patterned metal layer is on the bottom side surface of the first substrate including a first patterned layer portion contacting the bottom side of the first substrate lateral to the TSV.

Abstract: A method of forming a capacitive micro-electro-mechanical system (MEMS) sensor device includes at least one capacitive MEMS sensor element with at least one capacitive MEMS sensor cell. A patterned dielectric layer including a thick dielectric region and a thin dielectric region is formed on a top side of a first substrate. A second substrate is bonded to the thick dielectric region to provide at least one sealed micro-electro-mechanical system (MEMS) cavity. The second substrate is thinned to reduce a thickness of said second substrate to provide a membrane layer. Vias are etched through the membrane layer and said thick dielectric region extending into the first substrate to form embedded vias. A dielectric liner which lines the embedded vias is formed within the first substrate. The embedded vias are filed with electrically conductive TSV filler material to form a plurality of through-substrate vias (TSVs), said plurality of TSVs extending to at least a top of said membrane layer.

Abstract: A Capacitive Micromachined Ultrasonic Transducer (CMUT) device includes at least one CMUT cell including a first substrate having a top side including a patterned dielectric layer thereon including a thick and a thin dielectric region. A membrane layer is bonded on the thick dielectric region and over the thin dielectric region to provide a movable membrane over a micro-electro-mechanical system (MEMS) cavity. A through-substrate via (TSV) includes a dielectric liner which extends from a bottom side of the first substrate to a top surface of the membrane layer. A top side metal layer includes a first portion over the TSV, over the movable membrane, and coupling the TSV to the movable membrane. A patterned metal layer is on the bottom side surface of the first substrate including a first patterned layer portion contacting the bottom side of the first substrate lateral to the TSV.

Abstract: A packaged capacitive MEMS sensor device includes at least one capacitive MEMS sensor element with at least one capacitive MEMS sensor cell including a first substrate having a thick and a thin dielectric region. A second substrate with a membrane layer is bonded to the thick dielectric region and over the thin dielectric region to provide a MEMS cavity. The membrane layer provides a fixed electrode and a released MEMS electrode over the MEMS cavity. A first through-substrate via (TSV) extends through a top side of the MEMS electrode and a second TSV through a top side of the fixed electrode. A metal cap is on top of the first TSV and second TSV. A third substrate including an inner cavity and outer protruding portions framing the inner cavity is bonded to the thick dielectric regions. The third substrate together with the first substrate seals the MEMS electrode.

Abstract: A Capacitive Micromachined Ultrasonic Transducer (CMUT) device including at least one CMUT element with at least one CMUT cell is formed. A patterned dielectric layer thereon including a thick and a thin dielectric region is formed on a top side of a single crystal material substrate. A second substrate is bonded to the thick dielectric region to provide at least one sealed micro-electro-mechanical system (MEMS) cavity. The second substrate is thinned to reduce a thickness of said second substrate to provide a membrane layer. The membrane layer is etched to form a movable membrane over said MEMS cavity and to remove said membrane layer over said top side substrate contact area. The thin dielectric region is removed from over said top side substrate contact area. A top side metal layer is formed including a trace portion coupling said top side substrate contact area to said movable membrane.

Abstract: A Capacitive Micromachined Ultrasonic Transducer (CMUT) device includes at least one CMUT cell including a first substrate of a single crystal material having a top side including a patterned dielectric layer thereon including a thick and a thin dielectric region, and a through-substrate via (TSV) extending a full thickness of the first substrate. The TSV is formed of the single crystal material, is electrically isolated by isolation regions in the single crystal material, and is positioned under a top side contact area of the first substrate. A membrane layer is bonded to the thick dielectric region and over the thin dielectric region to provide a movable membrane over a micro-electro-mechanical system (MEMS) cavity. A metal layer is over the top side substrate contact area and over the movable membrane including coupling of the top side substrate contact area to the movable membrane.

Abstract: A Capacitive Micromachined Ultrasonic Transducer (CMUT) device includes at least one CMUT cell including a first substrate having a top side including a patterned dielectric layer thereon including a thick and a thin dielectric region. A membrane layer is bonded on the thick dielectric region and over the thin dielectric region to provide a movable membrane over a micro-electro-mechanical system (MEMS) cavity. A through-substrate via (TSV) includes a dielectric liner which extends from a bottom side of the first substrate to a top surface of the membrane layer. A top side metal layer includes a first portion over the TSV, over the movable membrane, and coupling the TSV to the movable membrane. A patterned metal layer is on the bottom side surface of the first substrate including a first patterned layer portion contacting the bottom side of the first substrate lateral to the TSV.

Abstract: An asymmetric insulated-gate field-effect transistor (100 or 102) has a source (240 or 280) and a drain (242 or 282) laterally separated by a channel zone (244 or 284) of body material (180 or 182) of a semiconductor body. A gate electrode (262 or 302) overlies a gate dielectric layer (260 or 300) above the channel zone. A more heavily doped pocket portion (250 or 290) of the body material extends largely along only the source. The source has a main source portion (240M or 280M) and a more lightly doped lateral source extension (240E or 280E). The drain has a main portion (242M or 282M) and a more lightly doped lateral drain extension (242E or 282E). The drain extension is more lightly doped than the source extension. The maximum concentration of the semiconductor dopant defining the two extensions occurs deeper in the drain extension than in the source extension. Additionally or alternatively, the drain extension extends further laterally below the gate electrode than the source extension.

Abstract: Bio-oil from a feedstock selected from mustard family seeds, mustard family seed presscake, mustard family seed defatted presscake, and mixtures thereof. The bio-oil is produced by a method involving (1) pyrolyzing the feedstock to produce bio-oil, bio-char and non-condensable gases, (2) removing the bio-char from the bio-oil, (3) condensing the bio-oil, and (4) precipitating the bio-oil.

Abstract: A gate electrode (302) of a field-effect transistor (102) is defined above, and vertically separated by a gate dielectric layer (300) from, a channel-zone portion (284) of body material of a semiconductor body. Semiconductor dopant is introduced into the body material to define a more heavily doped pocket portion (290) using the gate electrode as a dopant-blocking shield. A spacer (304T) having a dielectric portion situated along the gate electrode, a dielectric portion situated along the body, and a filler portion (SC) largely occupying the space between the other two spacer portions is provided. Semiconductor dopant is introduced into the body to define a pair of source/drain portions (280M and 282M) using the gate electrode and spacer as a dopant-blocking shield. The filler spacer portion is removed to convert the spacer to an L shape (304). Electrical contacts (310 and 312) are formed respectively to the source/drain portions.

Abstract: An asymmetric insulated-gate field-effect transistor (100) has a source (240) and a drain (242) laterally separated by a channel zone (244) of body material (180) of a semiconductor body. A gate electrode (262) overlies a gate dielectric layer (260) above the channel zone. A more heavily doped pocket portion (250) of the body material extends largely along only the source. Each of the source and drain has a main portion (240M or 242M) and a more lightly doped lateral extension (240E or 242E). The drain extension is more lightly doped than the source extension. The maximum concentration of the semiconductor dopant defining the two extensions occurs deeper in the drain extension than in the source extension. Additionally or alternatively, the drain extension extends further laterally below the gate electrode than the source extension. These features enable the threshold voltage to be highly stable with operational time.

Abstract: An asymmetric insulated-gate field-effect transistor (100 or 102) has a source (240 or 280) and a drain (242 or 282) laterally separated by a channel zone (244 or 284) of body material (180 or 182) of a semiconductor body. A gate electrode (262 or 302) overlies a gate dielectric layer (260 or 300) above the channel zone. A more heavily doped pocket portion (250 or 290) of the body material extends largely along only the source. The source has a main source portion (240M or 280M) and a more lightly doped lateral source extension (240E or 280E). The drain has a main portion (242M or 282M) and a more lightly doped lateral drain extension (242E or 282E). The drain extension is more lightly doped than the source extension. The maximum concentration of the semiconductor dopant defining the two extensions occurs deeper in the drain extension than in the source extension. Additionally or alternatively, the drain extension extends further laterally below the gate electrode than the source extension.

Abstract: Fabrication of an asymmetric field-effect transistor (100) entails defining a gate electrode (262) above, and vertically separated by a gate dielectric layer (260) from, a channel-zone portion (244) of body material of a semiconductor body. Semiconductor dopant is introduced into the body material to define a more heavily doped pocket portion (250) using the gate electrode as a dopant-blocking shield. A spacer (264T) is provided along the gate electrode. The spacer includes (i) a dielectric portion situated along the gate electrode, (ii) a dielectric portion situated along the semiconductor body, and (iii) a filler portion (SC) largely occupying the space between the other two spacer portions. Semiconductor dopant is introduced into the semiconductor body to define a pair of main source/drain portions (240M and 240E) using the gate electrode and the spacer as a dopant-blocking shield. The filler spacer portion is removed to convert the spacer to an L shape (264).

Abstract: An active optical fuze for detonating a missile warhead at a prescribed re is disclosed in combination with an optical guidance system target sensing head for a missile which incorporates an assembly of optical elements for receiving radiant energy from a target and wherein the optical axis of the receiving assembly is automatically rotated by guidance controlled means in response to received guidance radiation so as to track the target. A lasing diode is utilized as the fuze radiation transmitting device, the lasing diode being coupled to the receiving optical assembly and disposed coaxially therewith for emitting radiation outwardly along the optical axis of the receiving assembly such that the fuze radiation is automatically emitted in the target direction when the receiving assembly is rotated to track the target.